Aerospace & Defense Overview

Meet mission requirements with low power and high reliability Lattice FPGAs

With inherent SEU Resiliency, single chip non-volatile crypto solutions, and wide operating temperature range Lattice offers modernized FPGA platforms for the development of next generation milcom, guidance, and imaging solutions.

With a 35 year heritage in high reliability and ruggedized environments, Lattice FPGAs play a vital role in high reliability, secure and safety critical applications within the communications, data center, industrial, automotive, high-volume consumer, and aerospace & defense markets.

SWAP-C Optimized COTS FPGAs, with off-the-shelf FPGA products architected to offer extremely low power and a small footprint while supporting critical infrastructure applications and long product life without trading performance.

Key Lattice FPGA Features & Benefits

  • Lowest soft error rate and latchup immunity, more reliable than bulk CMOS FPGAs independent of the configuration bit technology
  • Industry leading incredibly small form-factor (starting at 2.5 mm x 2.5 mm) and reduced pitch packages (starting at 0.4 mm)
  • 75% better power than similar FPGAs
  • Hardened security engine with secure Unique ID and Side Channel Resiliency
  • Design tools offer latest advanced design flows which facilitate secure, low power applications, many iterations per day and fast time to market
  • Accelerate your design with Lattice’s award winning solution stacks

To learn how Lattice meets the technology needs of defense applications including leaded packages, extended operating temperature range and Known Good Die, contact the Lattice sales team by clicking below.

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Example Applications

Guidance Systems

  • Programmable system integration with 5Gbps transceivers, embedded memory, DSP and MCU
  • Sensor fusion, any-to-any connectivity and embedded vision

Chain of Trust Implementation

  • Hardware Root-of-Trust is the first link in chain that protects mission critical compute and communication platforms
  • Hardened device configuration engine cryptographically authenticates MachXO3D’s configuration image at power-on
  • Embedded security block provides cryptographic functions to authenticate other platform firmware at power-on

Mixed Reality Head-Mount Display

  • Small form factor packaging to meet stringent signal processing requirements
  • Flexible interfaces to sensors, analog and RF front-ends

FPGAs Best Suited for Defense

  • Certus-NX
    Certus-NX is Built on Lattice Nexus platform with Up to 4x lower power vs. similar FPGAs and Up to 100x higher reliability based on 28 nm FD-SOI technology solves the most challenging problems in leading edge defense platforms.
  • CrossLink-NX
    The Crosslink-NX with low soft error rate and lowest power in its class enables efficient processing, bridging and management capabilities to solve challenging problems in Software Defined Radios, Guidance Systems and Unmanned Aerial Vehicle (UAV).
  • MachXO3D
    The MachXO3D is the root of trust enabler with all required features onboard on a monolithic silicon with small footprint and low power that could be deployed in systems of all sizes, offering the most compact solution for untrusted supply chain.

Leaded Package Overview

Lattice offers leaded packaging services to eliminate the risk for tin-whisker and to improve reliability in presence of high shock and vibration applications.

Lattice Packages Wirebond Flip Chip
Wafer Pad or Bump Lead free Lead free
Substrate bump or pad finish Lead free Lead free
Caps No Caps No Caps
Substrate Solder Balls Leaded Leaded
Package Reflow Leaded Leaded

Known Good Die Product Overview

Lattice offers a wide variety of known good die products, tested to full data sheet specification within the specified temperature range with full traceability for each die shipped.

Family Logic Density Test Method Programmability Temperature Range
LatticeECP3 150K Known Good Die Volatile -40 C to 125 C
LatticeXP2 40K Good Die Non-volatile -40 C to 125 C
ECP5 85K Known Good Die Volatile -40 C to 125 C
MachXO3 10K Known Good Die Non-volatile -40 C to 105 C

Reference Designs

莱迪思Sentry采用MachXO3D的可信根参考设计

Reference Design

莱迪思Sentry采用MachXO3D的可信根参考设计

该设计采用莱迪思Sentry IP帮助您开发和测试一套完整的符合NIST 800-193规范的PFR解决方案。您还可以对其进行修改满足特定需求。
莱迪思Sentry采用MachXO3D的可信根参考设计
Lattice Sentry Root of Trust Reference Design for Mach-NX

Reference Design

Lattice Sentry Root of Trust Reference Design for Mach-NX

This design utilizes Platform Firmware Resiliency System Root of Trust to help develop and test a complete NIST 800-193 compliant security system that protects, detects, and recovers.
Lattice Sentry Root of Trust Reference Design for Mach-NX
单线聚合

Reference Design

单线聚合

使用低成本FPGA以TDM的方式聚合多个数据流,例如I2C、UART、I2S和GPIO,通过单线传输并解聚合。
单线聚合
人员侦测

Reference Design

人员侦测

使用莱迪思sensAI IP持续搜索附近是否有人存在并报告结果。可作修改用于检测其他任何物体。
人员侦测
对象计数

Reference Design

对象计数

基于莱迪思sensAI的对象计数应用示例。包括SPI、DDR IP模块、ISP引擎、8个CNN引擎和一个计数/标记叠加(overlay)引擎。
对象计数

IP Cores

RISC-V MC CPU IP核

IP Core

RISC-V MC CPU IP核

Propel IP模块:具有可选的定时器和PIC子模块的32位RISC-V处理器核,通过AHB-Lite总线连接到其他Propel各类IP模块。
RISC-V MC CPU IP核
RISC-V RX CPU IP Core

IP Core

RISC-V RX CPU IP Core

Lattice RISC-V RX IP processes data and instructions while monitoring the external interrupts, using 32-bit RISC-V processor core and several submodules.
RISC-V RX CPU IP Core
RISC-V SM CPU IP核

IP Core

RISC-V SM CPU IP核

RISC-V SM CPU IP可以在处理数据和指令时处理外部中断。该IP支持RV32I指令集、外部中断和调试,遵循JTAG – IEEE 1149.1标准。
RISC-V SM CPU IP核
莱迪思Sentry QSPI监视器IP核用于MachXO3D

IP Core

莱迪思Sentry QSPI监视器IP核用于MachXO3D

用于莱迪思Sentry的Propel IP模块:监视SPI/QSPI总线上的通信,可识别和阻止潜在的非法通信。
莱迪思Sentry QSPI监视器IP核用于MachXO3D
PCI Express x1 & x4 IP Core for Nexus-based FPGAs

IP Core

PCI Express x1 & x4 IP Core for Nexus-based FPGAs

The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.
PCI Express x1 & x4 IP Core for Nexus-based FPGAs

Development Kits & Boards

基于Mach-NX的莱迪思Sentry演示板

Board

基于Mach-NX的莱迪思Sentry演示板

这一完善的平台能够帮助您开发和测试符合NIST 800-193规范的PFR方案,包括实现调试、接口和拓展的各种特性。
基于Mach-NX的莱迪思Sentry演示板
CrossLink-NX评估板

Board

CrossLink-NX评估板

CrossLink-NX评估板载有一片40K逻辑单元的CrossLink-NX FPGA;可轻松访问FPGA上的大多数I/O和PCIe 5G SERDES; 拥有FPGA中间层板卡(FMC)、Raspberry Pi、MIPI CSI-2、D-PHY和通用接头,大大扩展了易用性。
CrossLink-NX评估板
USB3-GbE VIP IO开发板

Board

USB3-GbE VIP IO开发板

适用于视频接口平台(VIP)的USB 3.0 和千兆以太网输出板
USB3-GbE VIP IO开发板
ECP5评估板

Board

ECP5评估板

售价仅为99美元的ECP5评估板拥有一片85K LUT的ECP5-5G FPGA;可轻松访问大多数I/O以及SERDES;更支持Arduino和Raspberry Pi以及通用接口以提高可用性。
ECP5评估板
iCE40 UltraPlus 分线板

Board

iCE40 UltraPlus 分线板

适用于iCE40 UltraPlus 5K版器件的分线板
iCE40 UltraPlus 分线板

Demos

Crosslink-NX PCIe桥接板上的PCIe基础演示

演示

Crosslink-NX PCIe桥接板上的PCIe基础演示

该PCIe基础演示可以控制三个7段LED,并通过PCIe插槽操作FPGA的片上存储器。
Crosslink-NX PCIe桥接板上的PCIe基础演示
PCIe Colorbar Demo for Lattice Nexus-based FPGAs

演示

PCIe Colorbar Demo for Lattice Nexus-based FPGAs

PCIe Colorbar Demo displays a series of moving colorbars by streaming the image data using DMA transfers from the FPGA to the host system.
PCIe Colorbar Demo for Lattice Nexus-based FPGAs
PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

演示

PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

The PCI Express DMA Throughput Demo allows to initiate DMA read and write transactions, transferring data from the host to the FPGA and vice versa.
PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs
PCIe Multifunction Demo for Lattice Nexus-based FPGAs

演示

PCIe Multifunction Demo for Lattice Nexus-based FPGAs

Demonstrates the multifunction capabilities of the Crosslink-NX FPGA that allows access to GPIO, MDIO and I2C registers.
PCIe Multifunction Demo for Lattice Nexus-based FPGAs
莱迪思Sentry MachXO3D可信根演示

演示

莱迪思Sentry MachXO3D可信根演示

完整的位流/固件包可帮助您在采用MachXO3D的莱迪思Sentry演示板上演示和测试符合NIST 800-193规范的PFR解决方案
莱迪思Sentry MachXO3D可信根演示

Quality Programs

Lattice is committed to Industry Leadership in the supply of high quality programmable logic components and software design tools.

Commitment to Defense

Lattice is committed to providing the Defense market with industry’s most complete portfolio optimized for SWAP-C, longest product life cycle and dedicated local engineering support.

Documentation

资讯资源
标题 编号 版本 日期 格式 文件大小
选择全部
Defense Solutions Brief
I0271 Rev 1 8/4/2020 PDF 1.6 MB
标题 编号 版本 日期 格式 文件大小
选择全部
A Guide to the Benefits of the Lattice Nexus FPGA Platform for Mission-Critical Applications
WP0028 1.0 1/22/2021 PDF 449.4 KB

Support

技术支持

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