Lattice Solutions

Everything you need to quickly and easily complete your design

Share This Result >

Narrow Your Results



Solution Type



Device Support












Tags
































Providers

Clear All
  • PCIe Basic Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Basic Demo for Lattice Nexus-based FPGAs

    The PCIe Basic Demo allows you to control three 7 segment LEDs and manipulate the onboard memory of the FPGA through the PCIe slot.
    PCIe Basic Demo for Lattice Nexus-based FPGAs
  • PCIe Colorbar Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Colorbar Demo for Lattice Nexus-based FPGAs

    PCIe Colorbar Demo displays a series of moving colorbars by streaming the image data using DMA transfers from the FPGA to the host system.
    PCIe Colorbar Demo for Lattice Nexus-based FPGAs
  • PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

    The PCI Express DMA Throughput Demo allows to initiate DMA read and write transactions, transferring data from the host to the FPGA and vice versa.
    PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs
  • PCIe Multifunction Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Multifunction Demo for Lattice Nexus-based FPGAs

    Demonstrates the multifunction capabilities of the Crosslink-NX FPGA that allows access to GPIO, MDIO and I2C registers.
    PCIe Multifunction Demo for Lattice Nexus-based FPGAs
  • CertusPro-NX PCIe Bridge Board

    Board

    CertusPro-NX PCIe Bridge Board

    The CertusPro-NX PCIe Bridge Board enables video bridge capabilities to PCIe and embedded vision type applications.
    CertusPro-NX PCIe Bridge Board
  • Certus-NX Versa Evaluation Board

    Board

    Certus-NX Versa Evaluation Board

    The Certus-NX Versa Evaluation Board enables designers with connectivity features of the Certus-NX FPGA and assist engineers with prototyping and testing.
    Certus-NX Versa Evaluation Board
  • TSEMAC & SGMII Reference Design

    Reference Design

    TSEMAC & SGMII Reference Design

    Lattice TSEMAC & SGMII Reference Design implements 1G/100M/10M Ethernet application using a TSEMAC IP Core with a SGMII PCS IP Core in loopback mode.
    TSEMAC & SGMII Reference Design
  • RGMII to GMII Bridge Reference Design

    Reference Design

    RGMII to GMII Bridge Reference Design

    Lattice RGMII to GMII Bridge Reference Design provides a bi-directional bridge function for transferring data between RGMII and GMII.
    RGMII to GMII Bridge Reference Design
  • SGMII and Gb Ethernet PCS IP Core

    IP Core

    SGMII and Gb Ethernet PCS IP Core

    SGMII and Gb Ethernet PCS IP core is used as an interface for a discrete Ethernet PHY chip & can be used in bridging applications and/or PHY implementation.
    SGMII and Gb Ethernet PCS IP Core
  • XAUI 10Gb Ethernet Attachment Unit Interface IP Core

    IP Core

    XAUI 10Gb Ethernet Attachment Unit Interface IP Core

    10Gb Ethernet Attachment Unit Interface or XAUI includes support for the XAUI which is used to interface with physical layer devices in 10GbE networks.
    XAUI 10Gb Ethernet Attachment Unit Interface IP Core
  • 10Gb Ethernet XGXS

    IP Core

    10Gb Ethernet XGXS

    Archived IP Core supporting ORCA FPGAs - For reference only.
     
    10Gb Ethernet XGXS
  • Gigabit UDP/IP/MAC

    IP Core

    Gigabit UDP/IP/MAC

    A communication core for integrating embedded applications in private Ethernet networks implementing high-speed communication between FPGAs and network devices.
    Gigabit UDP/IP/MAC
  • Page 1 of 1
    First Previous
    1
    Next Last