CrossLink-NX

Embedded Vision and Processing FPGA

Built on the Lattice Nexus Platform - Up to 75% lower power vs similar FPGAs and small form factor packaging with sizes as small as 4 mm x 4 mm.

Provides Best-in-class Performance for Vision Processing Applications - Abundant DSP resources as well as high memory to logic cell ratio (up to 170 bits per logic cell) accelerates AI inferencing.

High Speed Interfaces - 2.5 Gbps Hardened MIPI D-PHY, 5 Gbps PCIe, 5 Gbps USB 3.2, 1.5 Gbps programmable I/O, 1066 Mbps DDR3. Supporting LVDS, subLVDS, OpenLDI (OLDI), and SGMII.

Low Power Standby Mode and USB Interface - Consumes < 70 uA of current under typical standby mode.

Features

  • Instant-on configuration – IO configures in 3 ms, and device as fast as 8 ms
  • Up to two hardened 4-lane MIPI D-PHY transceivers at 10 Gbps per PHY / 2.5 Gbps per lane
  • Up to 37 programmable source synchronous I/O pairs for camera and display interfacing
  • From 4 mm x 4 mm WLCS package (0.4 mm pitch) to 17 mm x 17 mm BGA package (0.8 mm pitch)
  • Lowest soft error rate in its class, 100X more reliable than competition
  • Available in Commercial, Industrial and Automotive (AEC-Q100 qualified) temperature grades

Jump to

Family Table

CrossLink-NX Device Selection Guide
Features CrossLink-NX CrossLinkU-NX
Devices LIFCL-17 LIFCL-33 LIFCL-40 LIFCL-33U
Logic Cells 17k 33k 39k 33k
Embedded Memory (EBR) Bits (Kb) 432 1152 1512 1152
Large Memory (LRAM) Bits (Kb) 2560 2560 1024 2560
18 X 18 Multipliers 24 64 56 64
ADC Blocks 2 2
GPLL 2 1 3 1
Hardened 10 Gbps D-PHY Quads 2 2
5 Gb/s PCIe Gen2 Hard IP 1
Temperature Grades 1 C, I, A C, I C, I, A C, I
Always On (AON) Block 1
USB 2.0/USB 3.2 Gen 1 Interface 1/1
0.4 mm Total I/O (Wide Range, High Performance, ADC3) (D-PHY Quads4, PCIe Lane5)

LIFCL-17 LIFCL-33 LIFCL-40 LIFCL-33U
72 WLCSP (3.7 x 4.1 mm) 45 (15, 24, 6) (1, 0)
0.5 mm Total I/O (Wide Range, High Performance, ADC3) (D-PHY Quads4, PCIe Lane5)

LIFCL-17 LIFCL-33 LIFCL-40 LIFCL-33U
72 QFN (10 x 10 mm) 46 (18, 22, 6) (1, 0) 44 (17, 22, 6) (1, 0)
84 WLCSP (3.1 x 7.4 mm) 60 (34, 26, 0) (0, 0) 44 (17, 27, 0) (0, 0)
121 csfBGA (6 x 6 mm)2 77 (23, 48, 6) (2, 0) 77 (23, 48, 6) (2, 0)
289 csBGA (9.5 x 9.5 mm) 179 (99, 74, 6) (2, 1)
0.65 mm Total I/O (Wide Range, High Performance, ADC3) (D-PHY Quads4, PCIe Lane5)

LIFCL-17 LIFCL-33 LIFCL-40 LIFCL-33U
104 fcCSP (5.5 x 8.5 mm)2 52 (20, 32, 0) (0, 0)
0.8 mm Total I/O (Wide Range, High Performance, ADC3) (D-PHY Quads4, PCIe Lane5)

LIFCL-17 LIFCL-33 LIFCL-40 LIFCL-33U
256 caBGA (14 x 14 mm)2 77 (23, 48, 6) (2, 0) 162 (82, 74, 6) (2, 1)
400 caBGA (17 x 17 mm) 191 (111, 74, 6) (2, 1)

1. C = Commercial, I = Industrial, A = Automotive
2. Package available in Automotive grade
3. Each ADC pin count reflects using dedicated complement pair and vRef
4. Each D-PHY quad consists of 4 D-PHY data lanes
5. Each PCIe lane consists of a Tx and Rx complement pair

Example Solutions

USB to Peripheral Interface Bridging

  • Create plug n play peripheral expansion on USB-enabled FPGA
  • Signal protocol conversion from USB 2.0 to I2C, SPI, and GPIO
  • Signal aggregation and de-aggregation over USB 2.0

Sensor Bridging Over USB

  • Bridge MIPI CSI-2 image sensor to USB interface
  • Signal protocol conversion from MIPI CSI-2 to USB
  • Uncompressed sensor bandwidth up to USB 3.2 Gen 1 (5 Gbps)

Edge AI Processing

  • Bridge one or multiple CSI-2 image sensors to processor interface (PCIe, CMOS, CSI-2)
  • Up to 3 Mb of internal RAM for processing
  • Offloads inferencing from CPU for object detection / counting
  • Combine video bridging and edge AI into a single device

Sensor Aggregation

  • Aggregate up to 11 MIPI CSI-2 image sensors into one MIPI CSI-2 output
  • Stitch data together into larger horizontal video frame
  • Use external DDR memory to stitch data into larger vertical video frame
  • Arbitrate data from image sensors using unique virtual channel numbers
  • Extend limited processor sensor interface capability and connect more sensors

Image Sensor Processing

  • Bridge one or multiple CSI-2 image sensors to processor interface (PCIe, CMOS, CSI-2)
  • Integrate full functional universal video pipeline
  • Examples: Debayer, color correction matrix, RGB gain, gamma correction…
  • Offloads ISP functionality from the processor

Signal Split or Duplication

  • Split or duplicate input CSI-2/DSI signal to multiple video outputs (up to 14)
  • Provide redundancy to sensor data in safety critical applications
  • Simplify applications which require one input to many display outputs

Videos

CrossLink-NX
Expand Video

Introducing CrossLink-NX

CrossLink-NX FPGA is the first family of FPGAs implemented on the new Lattice Nexus Platform. CrossLink-NX provides the energy efficiency, small form factor, high reliability and higher performance developers need to enable innovative embedded vision solutions for the Edge.
CrossLink-NX: Power Efficiency Demo
Expand Video

CrossLink-NX: Power Efficiency Demo

This demonstration measures the power consumption of Lattice’s CrossLink-NX FPGAs relative to other similar FPGAs using commercially available boards.
CrossLink-NX: Instant On Demo
Expand Video

CrossLink-NX: Instant On Demo

This demonstration measures the IO wakeup time of Lattice’s CrossLink-NX FPGAs relative to other similar FPGAs using commercially available development boards.
CrossLink-NX: Embedded Vision Demo
Expand Video

CrossLink-NX: Embedded Vision Demo

This demonstration shows a development board equipped with a CrossLink-NX FPGA, based on the Lattice Nexus platform. The FPGA has been programmed to perform camera aggregation, which is a common embedded vision use case found in many applications.
CrossLink-NX: Human Presence Demo
Expand Video

CrossLink-NX: Human Presence Demo

This demonstration shows a development board equipped with a CrossLink-NX FPGA, based on the Lattice Nexus platform. The FPGA has been programmed to perform human presence detection and counting, which is a common AI use case found in many applications.

Awards

Electroniques 2021 Electrons D'or Awards

Digital IC

Business Intelligence AI Excellence Award

2021 Finalist

The Electronics Industry Awards 2020

Embedded Solution Product of the Year

Leadership in Engineering Achievement Program (LEAP) Awards 2020

Bronze Medal- Embedded Computing Category

2020 Electronics Maker Best of Industry Awards

Best FPGA Award (Technology & Product Innovation category)

Design Resources

Development Kits & Boards

Our development boards & kits help streamline your design process

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Software

Complete Design Flows, High Ease of Use

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
CrossLink-NX caBGA256 Pin Migration Table
FPGA-SC-02014 1.0 10/27/2020 CSV 16.5 KB
CrossLink-NX QFN72 Pin Migration Table
FPGA-SC-02015 1.1 5/25/2022 CSV 5.6 KB
CrossLink-NX csfBGA121 Pin Migration Table
FPGA-SC-02016 1.0 10/27/2020 CSV 9.2 KB
CrossLink-NX LIFCL-33-Pinout
FPGA-SC-02040 0.80 8/31/2023 CSV 3.5 KB
CrossLink-NX LIFCL-17 Pinout
FPGA-SC-02006 0.92 10/26/2020 CSV 10.6 KB
CrossLink-NX LIFCL-40 Pinout
FPGA-SC-02018 1.21 12/28/2020 CSV 35.5 KB
CrossLink-NX LIFCL-33U-Pinout
FPGA-SC-02050 0.7 9/26/2023 CSV 4.3 KB
Memory User Guide for Nexus Platform
FPGA-TN-02094 1.6 3/19/2024 PDF 1.8 MB
CrossLink-NX Hardened D-PHY Usage Guide
FPGA-TN-02081 1.1 6/21/2021 PDF 1.2 MB
Thermal Management
FPGA-TN-02044 4.9 3/7/2024 PDF 1.1 MB
Using TraceID
FPGA-TN-02084 2.5 1/25/2023 PDF 400.6 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
CrossLink-NX-33 and CrossLinkU-NX Data Sheet
FPGA-DS-02104 0.94 2/29/2024 PDF 2.3 MB
CrossLink-NX Family Data Sheet
FPGA-DS-02049 2.0 10/26/2023 PDF 2.7 MB
Package Diagrams
FPGA-DS-02053 8.0 3/19/2024 PDF 9.1 MB
TSE MAC Driver API Reference
FPGA-TN-02341 1.0 12/21/2023 PDF 469.4 KB
Power Management and Calculation for CrossLink-NX Devices
FPGA-TN-02075 1.3 7/15/2021 PDF 1 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.4 2/28/2024 PDF 1.7 MB
sysDSP User Guide for Nexus Platform
FPGA-TN-02096 1.5 9/26/2023 PDF 1.6 MB
sysI/O User Guide for Nexus Platform
FPGA-TN-02067 2.2 10/19/2023 PDF 1.4 MB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 2.9 2/29/2024 PDF 2.6 MB
CrossLink-NX-33 and CrossLinkU-NX High-Speed I/O Interface
FPGA-TN-02280 0.83 2/27/2024 PDF 1.9 MB
I2C Hardened IP Usage Guide for Nexus Platform
FPGA-TN-02142 1.3 5/31/2022 PDF 1.4 MB
CrossLink-NX-33 and CrossLinkU-NX Hardware Checklist
FPGA-TN-02308 1.2 10/17/2023 PDF 722.6 KB
ADC User Guide for Nexus Platform
FPGA-TN-02129 1.7 9/4/2023 PDF 1.2 MB
CrossLink-NX Hardware Checklist
FPGA-TN-02149 1.4 6/5/2023 PDF 636.2 KB
Soft Error Detection (SED)/Correction (SEC) User Guide for Nexus Platform
FPGA-TN-02076 1.9 12/31/2023 PDF 560.5 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 1.8 2/28/2024 PDF 1 MB
Single Event Upset (SEU) Report for Nexus Platform
FPGA-TN-02174 1.4 9/26/2023 PDF 307.1 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.8 9/26/2023 PDF 399.4 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.3 12/5/2023 PDF 8.6 MB
Lattice Memory Mapped Interface (LMMI) and Lattice Interrupt Interface (LINTR) User Guide
FPGA-UG-02039 1.2 5/31/2022 PDF 1.7 MB
I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
I3C Controller Driver API Reference
FPGA-TN-02342 1.0 12/21/2023 PDF 894.8 KB
Common Programming and Configuration FAQs with Supplementary Concepts for CrossLink-NX, Certus-NX, and CertusPro-NX
FPGA-AN-02048 1.3 4/7/2024 PDF 1.8 MB
CrossLink-NX High-Speed I/O Interface
FPGA-TN-02097 1.9 4/4/2024 PDF 2.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
CrossLink-NX-33 and CrossLinkU-NX Data Sheet
FPGA-DS-02104 0.94 2/29/2024 PDF 2.3 MB
CrossLink-NX Family Data Sheet
FPGA-DS-02049 2.0 10/26/2023 PDF 2.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Advanced Configuration Security Usage Guide for Nexus Platform
This document would be provided through Technical Support Request after sign-in to Lattice web site. Please refer to Answer Database FAQ 6848 for detail instruction
FPGA-TN-02176 1.7 1/12/2023 WEB
Memory User Guide for Nexus Platform
FPGA-TN-02094 1.6 3/19/2024 PDF 1.8 MB
CrossLink-NX Hardened D-PHY Usage Guide
FPGA-TN-02081 1.1 6/21/2021 PDF 1.2 MB
Thermal Management
FPGA-TN-02044 4.9 3/7/2024 PDF 1.1 MB
Using TraceID
FPGA-TN-02084 2.5 1/25/2023 PDF 400.6 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
TSE MAC Driver API Reference
FPGA-TN-02341 1.0 12/21/2023 PDF 469.4 KB
Power Management and Calculation for CrossLink-NX Devices
FPGA-TN-02075 1.3 7/15/2021 PDF 1 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.4 2/28/2024 PDF 1.7 MB
sysDSP User Guide for Nexus Platform
FPGA-TN-02096 1.5 9/26/2023 PDF 1.6 MB
sysI/O User Guide for Nexus Platform
FPGA-TN-02067 2.2 10/19/2023 PDF 1.4 MB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 2.9 2/29/2024 PDF 2.6 MB
CrossLink-NX-33 and CrossLinkU-NX High-Speed I/O Interface
FPGA-TN-02280 0.83 2/27/2024 PDF 1.9 MB
I2C Hardened IP Usage Guide for Nexus Platform
FPGA-TN-02142 1.3 5/31/2022 PDF 1.4 MB
Adding Scalable Power and Thermal Management to Nexus FPGAs
FPGA-AN-02079 1.0 1/31/2024 PDF 1.3 MB
CrossLink-NX-33 and CrossLinkU-NX Hardware Checklist
FPGA-TN-02308 1.2 10/17/2023 PDF 722.6 KB
CrossLink-NX-33 Image Sensor Module Design Guide
FPGA-AN-02054 1.0 6/16/2022 PDF 396.1 KB
ADC User Guide for Nexus Platform
FPGA-TN-02129 1.7 9/4/2023 PDF 1.2 MB
CrossLink-NX Hardware Checklist
FPGA-TN-02149 1.4 6/5/2023 PDF 636.2 KB
Soft Error Detection (SED)/Correction (SEC) User Guide for Nexus Platform
FPGA-TN-02076 1.9 12/31/2023 PDF 560.5 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 1.8 2/28/2024 PDF 1 MB
Single Event Upset (SEU) Report for Nexus Platform
FPGA-TN-02174 1.4 9/26/2023 PDF 307.1 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.8 9/26/2023 PDF 399.4 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.3 12/5/2023 PDF 8.6 MB
I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
I3C Controller Driver API Reference
FPGA-TN-02342 1.0 12/21/2023 PDF 894.8 KB
Common Programming and Configuration FAQs with Supplementary Concepts for CrossLink-NX, Certus-NX, and CertusPro-NX
FPGA-AN-02048 1.3 4/7/2024 PDF 1.8 MB
CrossLink-NX High-Speed I/O Interface
FPGA-TN-02097 1.9 4/4/2024 PDF 2.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
CrossLink-NX caBGA256 Pin Migration Table
FPGA-SC-02014 1.0 10/27/2020 CSV 16.5 KB
CrossLink-NX QFN72 Pin Migration Table
FPGA-SC-02015 1.1 5/25/2022 CSV 5.6 KB
CrossLink-NX csfBGA121 Pin Migration Table
FPGA-SC-02016 1.0 10/27/2020 CSV 9.2 KB
CrossLink-NX LIFCL-33-Pinout
FPGA-SC-02040 0.80 8/31/2023 CSV 3.5 KB
CrossLink-NX LIFCL-17 Pinout
FPGA-SC-02006 0.92 10/26/2020 CSV 10.6 KB
CrossLink-NX-17-Package-DD
1.0 1/10/2024 CSV 19 KB
CrossLink-NX LIFCL-40 Pinout
FPGA-SC-02018 1.21 12/28/2020 CSV 35.5 KB
CrossLink-NX and Certus-NX Pin Migration
FPGA-TN-02218 1.0 3/22/2024 PDF 495.5 KB
CrossLink-NX LIFCL-33U-Pinout
FPGA-SC-02050 0.7 9/26/2023 CSV 4.3 KB
Package Diagrams
FPGA-DS-02053 8.0 3/19/2024 PDF 9.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Always ON Module - User Guide
FPGA-IPUG-02216 1.0 9/26/2023 PDF 554.6 KB
Lattice Memory Mapped Interface (LMMI) and Lattice Interrupt Interface (LINTR) User Guide
FPGA-UG-02039 1.2 5/31/2022 PDF 1.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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subLVDS to MIPI CSI-2 Image Sensor Bridge with CrossLink-NX - Documentation
FPGA-RD-02217 1.0 5/1/2021 PDF 2.5 MB
subLVDS to MIPI CSI-2 Image Sensor Bridge with CrossLink-NX - Source Code
FPGA-RD-02217 1.0 5/1/2021 ZIP 6.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Notification of Changes to CrossLink-NX™ Data Sheet and Certus-NX™ Data Sheet
PCN02A-22 1.0 4/4/2022 PDF 329.6 KB
PCN02A-21- Release of Crosslink‐NX Datasheet Revision 1.2
PCN02A-21 1.0 10/19/2021 PDF 93.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
FPGA-SC-02005 7.9 2/21/2024 ZIP 2.5 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Product Selector Guide
I0211 43.0 12/5/2023 PDF 7.6 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice Crosslink-NX: Embedded Vision Processing at the Edge
1.0 1/18/2020 PDF 523.2 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[BSDL] LIFCL-33 BBG484
FPGA-MD-02029 1.15 6/7/2022 BSM 32 KB
[BSDL] LIFCL-33 WLCSP84
FPGA-MD-02030 1.15 6/7/2022 BSM 20.6 KB
[BSDL] LIFCL-40
1.0 12/11/2019 ZIP 21.3 KB
[BSDL] LIFCL-33U WLCSP84
FPGA-MD-02050 1.14 9/26/2023 BSM 18.9 KB
[BSDL] LIFCL-33U FCCSP104
FPGA-MD-02051 1.14 9/26/2023 BSM 20.4 KB
[BSDL] LIFCL-17
FPGA-MD-02010 1.14 12/16/2019 ZIP 19.2 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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CrossLink-NX Device Family DELPHI Models
FPGA-MD-02032 1.0 12/10/2019 ZIP 191.5 KB
CrossLinkU-NX DELPHI Models
FPGA-MD-02054 0.81 10/19/2023 ZIP 22.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[IBIS] LIFCL-33 and LIFCL-33U
FPGA-MD-02036 1.1 9/26/2023 ZIP 12.4 MB
[IBIS] LIFCL-40
1.0 12/11/2019 ZIP 10.5 MB

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