Satellite Communications

Low power, reliable FPGAs for Communications

Related Products

Satellite communication systems where bandwidth and power are at a premium are challenged to deliver higher bandwidth and more flexible connectivity in LEO constellations and beyond where radiation is a constant threat to electronics. Lattice FPGAs with inherent radiation resilience and embedded hardened error correction implement complex communication algorithms such as software defined radios and connectivity solutions with digital flexible payloads while withstanding radiation. 

  • Immunity to single event latch up and high Total Ionizing Dose resilience in presence of heavy ions
  • Novel configuration memory architecture significantly lowers multiple-bit upsets.
  • Mitigation techniques including built-in error detection and correction , sophisticated Triple Modular Redundancy and fault tolerant design techniques
  • Low power and compact packages enable novel distributed architectures deployed in small satellites

Features

  • Up to 1800 high performance DSP blocks and 1000 embedded memory blocks coupled with HDL programming flow accelerate development of novel signal processing algorithms.
  • Lowest soft error rate (SER) in its class and highest latch-up immunity coupled with built-in scrubber to maximize integrity of space systems.
  • Commercial-off-the-shelf (COTS) plastic components speed up prototype build and maintain same design for flight.
  • Complete satellite reference designs with ecosystem partners analog front end, thermal solutions and power delivery networks accelerate time to launch.

Jump to

Example Applications

Sensor Control

  • Bridge processor to sensors for distributed architectures
  • Small packages and soft RISC-V Cores for control / management
  • Embedded ADC and DAC blocks to simplify design and test 

Telemetry

  • Instant-on performance enable fast response and boot time requirements
  • In-orbit reconfiguration to future proof your design
  • Large on-chip memory for on-chip processing and storage 

Data Acquisition

  • Digital Signal Processing to offload SBC and accelerate complex functions
  • High speed Serdes simplifies design and supports multiple protocols
  • Vision interface and signal processing adapts to a variety of sensors

Reference Design

Object Classification Reference Design

Reference Design

Object Classification Reference Design

The Object Classification reference design shows examples on implementing machine-learning based object classification to edge devices applications.
Object Classification Reference Design
ADC Interface

Reference Design

ADC Interface

Interfaces with the Texas Instruments (TI) ADS64XX family of ADCs via LatticeECP3 FPGA high-speed LVDS I/O
ADC Interface
ECC Module Reference Design

Reference Design

ECC Module Reference Design

Provides Single Error Correction - Double Error Detection (SECDED) capability based on a class of optimal minimum oddweight error parity codes
ECC Module Reference Design

Demo

Object Classification Demonstration

Demo

Object Classification Demonstration

This object classification demo provides a sample application for detecting, classifying, and tracking multiple objects running on CertusPro-NX FPGA.
Object Classification Demonstration
Lattice Image Signal Processing Demo

Demo

Lattice Image Signal Processing Demo

Provides a complete ISP example design on the Lattice ECP5 FPGA for the Embedded Vision Development Kit, ideal for Industrial, Medical, and Automotive applications.
Lattice Image Signal Processing Demo

IP Cores

UART 16550 IP Core

IP Core

UART 16550 IP Core

​​Lattice UART16550 IP Core is designed for use in serial communication, supporting the RS-232, RS-422, RS-485, and Electronic Industries Association (EIA) standards, among others.​
UART 16550 IP Core

Development Kits & Boards

CertusPro-NX Voice and Vision Machine Learning Board

Board

CertusPro-NX Voice and Vision Machine Learning Board

Design AI use cases for the Edge quickly! This board along with the Lattice sensAI solution stack provide the tools for developing vision and audio-based AI applications.
CertusPro-NX Voice and Vision Machine Learning Board

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
High Reliability & Functional Safety for FPGAs with Synplify & Radiant
WP0036 1.0 3/25/2024 PDF 2.3 MB
Lattice Avant SED/SEC User Guide
FPGA-TN-02290 0.82 6/9/2025 PDF 585.4 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 2.4 8/27/2025 PDF 1.4 MB
Thermal Management
FPGA-TN-02044 5.7 10/13/2025 PDF 1.1 MB
Power Management and Calculation for Certus-NX, CertusPro-NX, and MachXO5-NX Devices
FPGA-TN-02257 1.1 5/31/2022 PDF 1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Lattice Avant SED/SEC User Guide
FPGA-TN-02290 0.82 6/9/2025 PDF 585.4 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 2.4 8/27/2025 PDF 1.4 MB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 5.1 8/5/2025 PDF 693.7 KB
Thermal Management
FPGA-TN-02044 5.7 10/13/2025 PDF 1.1 MB
Power Management and Calculation for Certus-NX, CertusPro-NX, and MachXO5-NX Devices
FPGA-TN-02257 1.1 5/31/2022 PDF 1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
SEDC IP Module User Guide – Lattice Radiant Software
FPGA-IPUG-02066 1.2 6/23/2021 PDF 908.3 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
High Reliability & Functional Safety for FPGAs with Synplify & Radiant
WP0036 1.0 3/25/2024 PDF 2.3 MB

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