Lattice Solutions

Board

Embedded Vision Development Kit

Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.

CrossLink, ECP5 / ECP5-5G 

3D Video, Camera, DDR SDRAM, HDMI, Image Processing, Machine Learning/AI, Lattice sensAI, Signal Aggregation, Video Tx/Rx, VIP, Lattice mVision, IoT & Wearables, Smart Toys & Robots, Home Control Appliances & Security, Notebooks & PCs, Tablets, Printers, AR / VR & Drones, UAVs 

Demo

DDR3 Memory Interface Demonstration

The Lattice DDR3 Memory Interface demonstrates the functionality of DDR3 SDRAM Controller IP at core speed of 400MHz and 800Mbps.

Certus-NX, ECP5 / ECP5-5G 

DDR SDRAM 

Board

USB3-GbE VIP IO Board

Output board for Video Interface Platform (VIP) and Embedded Vision Development Kit - adds video over USB 3.0 and Gigabit Ethernet.

CrossLink, ECP5 / ECP5-5G 

Ethernet, USB3, Video Tx/Rx, VIP, Lattice mVision, Defense 

Board

ECP5 Evaluation Board

Evaluation and development for ECP5-5G FPGA - 85K LUTs. Includes generous IO access and easy expansion to PMOD, Arduino, RaspberryPI, SERDES interface and more

ECP5 / ECP5-5G 

Arduino, Breakout, PMOD, Raspberry Pi, SERDES, Versa Connector, TOR Switch, AR / VR & Drones, Defense 

Reference Design

Human Face Identification Reference Design

Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.

ECP5 / ECP5-5G, CertusPro-NX, CrossLink-NX 

Object Detection, Object Identification, Lattice sensAI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs 

Reference Design

Object Counting AI

An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine

ECP5 / ECP5-5G, CrossLink-NX 

Machine Learning/AI, Lattice sensAI, Object Counting, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, Automotive 

IP Core

Convolutional Neural Network (CNN) Accelerator IP

Implement AI solutions with CNNs from common or custom networks. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.

ECP5 / ECP5-5G 

Machine Learning/AI, Lattice sensAI, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense 

IP Core

Helion IONOS Image Signal Processing IP Portfolio

Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.

MachXO, LatticeXP2, LatticeECP3, CrossLink, ECP5 / ECP5-5G, CrossLink-NX 

HDR, Image Processing, Video Tx/Rx, Lattice mVision, Automotive 

Demo

Lattice Image Signal Processing Demo

Provides a complete ISP example design on the Lattice ECP5 FPGA for the Embedded Vision Development Kit, ideal for Industrial, Medical, and Automotive applications.

ECP5 / ECP5-5G, CertusPro-NX 

Image Signal Processing, Lattice mVision, Space 

Reference Design

Lattice Image Signal Processing Reference Design

Configure an ECP5 FPGA-based ISP solution tailored to your Industrial, Medical, and Automotive application.

ECP5 / ECP5-5G, CrossLink 

Image Signal Processing, Lattice mVision 

Demo

Human Counting AI Demo

Human upper-body detection and counting demonstration utilizes Lattice’s ECP5 FPGA and a Convolutional Neural Network (CNN) acceleration engine

ECP5 / ECP5-5G, CrossLink-NX 

Machine Learning/AI, Object Counting, Object Detection, Lattice sensAI, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, Automotive 

Demo

Human Face Identification Demonstration

Register and identify faces without retraining, eliminating the need for uploading images and lengthy retraining using a GPU.

ECP5 / ECP5-5G, CertusPro-NX, CrossLink-NX 

Machine Learning/AI, Object Detection, Object Identification, Lattice sensAI, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, Camera 

Demo

Human Presence Detection AI Demo

Uses an artificial intelligence (AI) algorithm to detect human presence with either the powerful ECP5 FPGA, or small, low-power iCE40 UltraPlus FPGA.

iCE40 UltraPlus, ECP5 / ECP5-5G 

Machine Learning/AI, Object Detection, Lattice sensAI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs 

Demo

Package Detection AI Demo

Uses Convolutional Neural Network (CNN) Accelerator IP on the ECP5 FPGA to detect packages. Output is shown via HDMI with a bounding box drawn around packages.

ECP5 / ECP5-5G 

Machine Learning/AI, Object Detection, Lattice sensAI 

Demo

Speed Sign Detection AI Demo

Uses a Convolutional Neural Network in the ECP5 FPGA to detect speed limit signs and determine the indicated speed.

ECP5 / ECP5-5G 

Machine Learning/AI, Object Detection, Object Identification, Lattice sensAI, UAVs 

Demo

Vehicle Classification AI Demo

Classifies vehicle types using a Convolutional Neural Network (CNN) Accelerator IP on the ECP5 FPGA. HDMI output uses color-coded bounding boxes.

ECP5 / ECP5-5G 

Machine Learning/AI, Object Detection, Object Identification, Lattice sensAI 

Board

LimeSDR Mini Development Board by Lime Microsystems

LimeSDR Mini Dev Board is a low cost, open source and apps-enabled SDR platform that can be used to support any type of wireless communication standard.

ECP5 / ECP5-5G 

Community Sourced, RF Transceiver, FTDI, GPIO, JTAG 

IP Core

Tri-Speed Ethernet MAC IP Core

The TSEMAC IP core have the logic, interfacing & clocking infra to ably integrate an external industry-standard Ethernet PHY with an internal processor

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, LatticeSC/M, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E 

Connectivity IP Suite, Data Communication, Ethernet, Value IP Suite, Defense, Automotive, APB, AXI, AXI-Lite Interface, AHB 

Reference Design

Generic Soft SPI Master Controller Reference Design

Provides an interface between a generic processor with parallel bus interface and external SPI devices.

MachXO2, MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 

SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 

Reference Design

Soft I2C Bus Master

Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3, Mach-NX 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C