Lattice Solutions

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  • Embedded Vision Development Kit

    Board

    Embedded Vision Development Kit

    Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.
    Embedded Vision Development Kit
  • USB3-GbE VIP IO Board

    Board

    USB3-GbE VIP IO Board

    Output board for Video Interface Platform (VIP) and Embedded Vision Development Kit - adds video over USB 3.0 and Gigabit Ethernet.
    USB3-GbE VIP IO Board
  • ECP5 Evaluation Board

    Board

    ECP5 Evaluation Board

    Evaluation and development for ECP5-5G FPGA - 85K LUTs. Includes generous IO access and easy expansion to PMOD, Arduino, RaspberryPI, SERDES interface and more
    ECP5 Evaluation Board
  • Human Face Identification

    Reference Design

    Human Face Identification

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.
    Human Face Identification
  • Object Counting

    Reference Design

    Object Counting

    An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine
    Object Counting
  • CNN Accelerator IP

    IP Core

    CNN Accelerator IP

    Implement AI solutions with CNNs from common or custom networks. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.
    CNN Accelerator IP
  • Human Counting

    Demo

    Human Counting

    Human upper-body detection and counting demonstration utilizes Lattice’s ECP5 FPGA and a Convolutional Neural Network (CNN) acceleration engine
    Human Counting
  • Human Face Identification

    Demo

    Human Face Identification

    Register and identify faces without retraining, eliminating the need for uploading images and lengthy retraining using a GPU.
    Human Face Identification
  • Human Presence Detection

    Demo

    Human Presence Detection

    Uses an artificial intelligence (AI) algorithm to detect human presence with either the powerful ECP5 FPGA, or small, low-power iCE40 UltraPlus FPGA.
    Human Presence Detection
  • Package Detection

    Demo

    Package Detection

    Uses Convolutional Neural Network (CNN) Accelerator IP on the ECP5 FPGA to detect packages. Output is shown via HDMI with a bounding box drawn around packages.
    Package Detection
  • Speed Sign Detection

    Demo

    Speed Sign Detection

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect speed limit signs and determine the indicated speed.
    Speed Sign Detection
  • Vehicle Classification

    Demo

    Vehicle Classification

    Classifies vehicle types using a Convolutional Neural Network (CNN) Accelerator IP on the ECP5 FPGA. HDMI output uses color-coded bounding boxes.
    Vehicle Classification
  • DisplayPort IP

    IP Core

    DisplayPort IP

    Lattice has partnered with Bitec to bring the DisplayPort 1.4a compliant IP Core (with eDP 1.4 support) to the ECP5 FPGA. Supports resolutions of up to 1080p60
    DisplayPort IP
  • DisplayPort VIP Input Board

    Board

    DisplayPort VIP Input Board

    Expands the Lattice VIP board ecosystem to support DisplayPort 1.4a (DP) video input - up to 4 lanes at 1.62 or 2.7 Gbps.
    DisplayPort VIP Input Board
  • DisplayPort VIP Output Board

    Board

    DisplayPort VIP Output Board

    Expands the Lattice VIP board ecosystem to support DisplayPort 1.4a (DP) video output - up to 4 lanes at 1.62 or 2.7 Gbps.
    DisplayPort VIP Output Board
  • DisplayPort Receive Demo

    Demo

    DisplayPort Receive Demo

    Uses Bitec's DisplayPort IP core on the ECP5 FPGA in Lattice's Embedded Vision Development Kit. Compliant with DisplayPort 1.4a (including eDP 1.4 support).
    DisplayPort Receive Demo
  • DisplayPort Transmit Demo

    Demo

    DisplayPort Transmit Demo

    Uses Bitec's DisplayPort IP core on the ECP5 FPGA in Lattice's Embedded Vision Development Kit. Compliant with DisplayPort 1.4a (including eDP 1.4 support).
    DisplayPort Transmit Demo
  • Tri-Speed Ethernet MAC Core IP

    IP Core

    Tri-Speed Ethernet MAC Core IP

    Transmits and receives data between a host processor and an Ethernet network. IEEE 802.3 compliant. Supports 10/100/1000 operation.
    Tri-Speed Ethernet MAC Core IP
  • 3D Depth Mapping

    Demo

    3D Depth Mapping

    Determines the distance between an embedded device and an object using a Semi-Global Block Matching (SGBM) algorithm to determine 64 different disparity levels
    3D Depth Mapping
  • Machine Learning Adapter Card

    Board

    Machine Learning Adapter Card

    Mass Storage Adapter and Microphone for VIP ecosystem
    Machine Learning Adapter Card
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