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  • Image Signal Processing IP Cores Suite

    IP Core

    Image Signal Processing IP Cores Suite

    The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.
    Image Signal Processing IP Cores Suite
  • Embedded Vision Development Kit

    Board

    Embedded Vision Development Kit

    Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.
    Embedded Vision Development Kit
  • User Tracking and Onlooker Detection Demonstration

    Demo

    User Tracking and Onlooker Detection Demonstration

    Sample demonstration for detection and tracking of multiple human faces running on a low power general purpose FPGA using CNN Model
    User Tracking and Onlooker Detection Demonstration
  • User Background Blurring Demonstration

    Demo

    User Background Blurring Demonstration

    Efficient and low power approach for implementing user background blurring using Lattice CrossLink-NX FPGA
    User Background Blurring Demonstration
  • Scene Segmentation Reference Design

    Reference Design

    Scene Segmentation Reference Design

    Efficient and low power approach for implementing scene segmentation using Lattice CrossLink-NX FPGA
    Scene Segmentation Reference Design
  • Helion IONOS Image Signal Processing IP Portfolio

    IP Core

    Helion IONOS Image Signal Processing IP Portfolio

    Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.
    Helion IONOS Image Signal Processing IP Portfolio
  • eUSB 3.1 FMC

    Board

    eUSB 3.1 FMC

    eUSB 3.1 FMC board is to validate USB 3.1 functionality with FPGA’s inbuilt serial transceivers. It has ULPI PHY chip to validate USB 2.0 functionality.
    eUSB 3.1 FMC
  • Tachysséma Développement 101 Module

    Board

    Tachysséma Développement 101 Module

    A versatile compact low-power stand-alone module with LPDDR4 & 10G SERDES. Excellent compact solution (27x47m) for embedded imaging and vision applications.
    Tachysséma Développement 101 Module
  • Tachysséma Développement 201 Board

    Board

    Tachysséma Développement 201 Board

    A powerful development board that makes development, testing and validation of FPGA CertusPro-NX projects easier and supports 10 GbE SerDes and LPDDR4 memory.
    Tachysséma Développement 201 Board
  • MAS LIFCL Evaluation Board

    Board

    MAS LIFCL Evaluation Board

    This modular, flexible and easy-to-use CrossLink-NX 17 board is designed for video applications, including CSI2 MIPI, LVDS HDMI (through PMOD).
    MAS LIFCL Evaluation Board
  • 3D Depth Mapping - SGBM Algorithm

    Demo

    3D Depth Mapping - SGBM Algorithm

    Determines the distance between an embedded device and an object using a Semi-Global Block Matching (SGBM) algorithm to determine 64 different disparity levels
    3D Depth Mapping - SGBM Algorithm
  • Color Space Converter (CSC) IP Core

    IP Core

    Color Space Converter (CSC) IP Core

    The Lattice Color Space Converter IP Core is widely parameterizable and can support any custom color space conversion requirement.
    Color Space Converter (CSC) IP Core
  • DPC CCM – Color correction

    IP Core

    DPC CCM – Color correction

    DPC CCM is designed to reduce the difference between the spectral characteristics of an image sensor and the spectral response of the human eye.
    DPC CCM – Color correction
  • DPC Color Conversion

    IP Core

    DPC Color Conversion

    DPC Color Conversion allows real-time conversion of the RGB colour space into the YCbCr colour space.
    DPC Color Conversion
  • DPC Convolution 3x3

    IP Core

    DPC Convolution 3x3

    DPC Conv3x3 applies a kernel to a video stream, in real time, in order to obtain spatial filtering such as Sobel, Gaussian, Laplacian and more.
    DPC Convolution 3x3
  • DPC Debayer

    IP Core

    DPC Debayer

    DPC Debayer reconstructs RGB images, in real time, from RAW data captured by an image sensor.
    DPC Debayer
  • DPC Defective Pixel Correction

    IP Core

    DPC Defective Pixel Correction

    DPC Defective detects and corrects defective pixels in applications with a Bayer pattern image sensor.
    DPC Defective Pixel Correction
  • DPC Gamma RGB

    IP Core

    DPC Gamma RGB

    DPC Gamma RGB is the IP dedicated to correcting, in real time, the gamma transformation curve of an incoming video stream.
    DPC Gamma RGB
  • DPC HDR

    IP Core

    DPC HDR

    DPC HDR obtains an HDR (High Dynamic Range) output stream from two separate input streams (high exposure and low exposure).
    DPC HDR
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