Data Center Switches

NIST compliant, Secure, Scalable - Control, Power and Thermal management PLD

Related Applications

Modern-day switches are required to implement security in hardware to ensure end-to-end security to combat the presence of malicious actors in the supply chain. To meet the ever increasing demand on data throughput, the main switch and control processor are becoming more complex and with increased TDP. This makes the power management and thermal management a lot more complex. With the increased number of communication ports, the control PLD is expected to control many I2C channels, LEDs and sense more signals.

  • Standardized, scalable control PLD family with wide range of density and I/O options
  • Lattice’s PFR Stack enables integration of Platform Firmware Resilience (PFR) function to the Control PLD
  • Integrates power and thermal management functions

Jump to

Block Diagram

Switches

Example Use Cases

Control PLD in the CPUExpand Image

Control PLD in the CPU

  • Control PLD for sequencing and side-channel logic, SGPIO
  • Secure Platform RoT for Platform Firmware Resilience (CPU)
    • Supply Chain Protection
    • RTS- Encryption Key Storage, data sealing (network usage logs)
Control PLD in Switch FabricExpand Image

Control PLD in Switch Fabric

  • Control PLD + PM for sequencing, glue logic
  • Control interface for multi-port card
  • Secure Platform RoT
    • PFR - Switch SoC, BMC and CPU Firmware(ComExp)
    • Onboarding of multi-port card
CPLD in Multi-PortExpand Image

CPLD in Multi-port

  • Control PLD + PM for sequencing, glue logic
  • Control Interface for multi-port card
  • Secure Platform RoT
    • PFR - Switch SoC, BMC and CPU Firmware(ComExp)
    • Onboarding of multi-port card
Power Thermal ManagementExpand Image

Overall Power & Thermal Management

  • Precision power monitoring with telemetry support
  • Accurate temperature monitoring
  • Fan control
  • Power supply trimming and margining
  • Fault log with time stamp

Reference Designs

8N1 UART Transceiver Reference Design

Reference Design

8N1 UART Transceiver Reference Design

8-bit data, no parity, and 1 stop bit Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel and parallel to serial conversions on data characters received from a peripheral device or CPU
iCE40 UltraPlus, MachXO2 
UART, Bus Controllers, TOR Switch 
8N1 UART Transceiver Reference Design
Generic Soft SPI Master Controller Reference Design

Reference Design

Generic Soft SPI Master Controller Reference Design

Provides an interface between a generic processor with parallel bus interface and external SPI devices.
MachXO2, MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 
SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
Generic Soft SPI Master Controller Reference Design
Soft I2C Bus Master

Reference Design

Soft I2C Bus Master

Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families
CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3, Mach-NX 
5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 
Soft I2C Bus Master
Soft I2C Slave Peripheral

Reference Design

Soft I2C Slave Peripheral

Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families
CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3 
5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 
Soft I2C Slave Peripheral
I2C Bus Master

Reference Design

I2C Bus Master

Demonstrates how a fast and configurable I2C-Bus Master Controller can be constructed and utilized in a Lattice CPLD/FPGA device
MachXO, LatticeXP2, ispMACH 4000ZE, MachXO2, LatticeECP3, Platform Manager, ECP5 / ECP5-5G, MachXO3 
Bus Controllers, I2C, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, 5G 
I2C Bus Master
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Demo

Power Sequencing with Fault Logging Demo

Demo

Power Sequencing with Fault Logging Demo

Uses L-ASC10 to monitor, sequence four separate Power Planes from a central control point. Logs faults with timestamps. Expandable.
Platform Manager 2 & L-ASC10, MachXO3 
Mixed-Signal, Power Management, TOR Switch, Guidance Systems, 5G, Defense, SDR 
Power Sequencing with Fault Logging Demo
Soft I2C Master and Slave – Simple Write and Read

Demo

Soft I2C Master and Slave – Simple Write and Read

Demonstrates the operation of an I2C Master and Slave doing simple write and read of data.
iCE40 UltraPlus, MachXO3 
Computing, IoT, TOR Switch, Bus Controllers, I2C 
Soft I2C Master and Slave – Simple Write and Read
Generic Soft SPI Master Controller Demonstration

Demo

Generic Soft SPI Master Controller Demonstration

This demo implements the Generic Soft SPI Master Controller Reference Design by performing simple transactions to the external SPI Flash device found in the MachXO3-9400 Development Board
MachXO2, MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 
SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
Generic Soft SPI Master Controller Demonstration

IP Cores

RISC-V MC CPU IP Core

IP Core

RISC-V MC CPU IP Core

The Lattice RISC-V MC CPU soft IP contains a 32-bit RISC-V processor core and optional submodules – Timer and Programmable Interrupt Controller (PIC).
MachXO3D, Certus-NX, CrossLink-NX, Avant-E, MachXO5-NX, CertusPro-NX, MachXO3, MachXO2, Avant-G, Avant-X, ECP5 / ECP5-5G 
AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 
RISC-V MC CPU IP Core
RISC-V SM CPU IP Core

IP Core

RISC-V SM CPU IP Core

Lattice RISC-V SM CPU IP core supports the RV32I instruction set, external interrupt, and debug feature, which is JTAG – IEEE 1149.1 compliant.
Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, MachXO3D, MachXO3, MachXO2, Avant-G, Avant-X, ECP5 / ECP5-5G 
AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 
RISC-V SM CPU IP Core
I3C Controller IP Core

IP Core

I3C Controller IP Core

I3C Controller IP Core is a two-wire, bi-directional serial bus designed for use with many sensor secondary devices controlled by a single I3C controller.
CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, iCE40 UltraPlus, Avant-E, Avant-G, Avant-X 
I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive, MIPI Bundle 
I3C Controller IP Core
I3C Target IP Core

IP Core

I3C Target IP Core

I3C Target IP Core enables greater than 10-fold speed improvements, more effective bus power management, and backward compatibility with I2C devices.
CertusPro-NX, CrossLink-NX, Certus-NX, MachXO5-NX, iCE40 UltraPlus, Avant-E, Avant-G, Avant-X 
I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive, MIPI Bundle 
I3C Target IP Core
AHB-Lite Interconnect Module

IP Core

AHB-Lite Interconnect Module

Propel IP Module: Fully parameterized interconnect for AHB-Lite systems - bus widths of 8 to 1024 bits, address widths up to 32 bits, 32 masters and 32 slaves.
MachXO3D, Certus-NX, CrossLink-NX, Mach-NX 
AMBA, Lattice Propel, AHB-Lite, TOR Switch, Automotive 
AHB-Lite Interconnect Module
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Development Kits & Boards

ECP5 Evaluation Board

Board

ECP5 Evaluation Board

Evaluation and development for ECP5-5G FPGA - 85K LUTs. Includes generous IO access and easy expansion to PMOD, Arduino, RaspberryPI, SERDES interface and more
ECP5 / ECP5-5G 
Arduino, Breakout, PMOD, Raspberry Pi, SERDES, Versa Connector, TOR Switch, AR / VR & Drones, Defense 
ECP5 Evaluation Board
MachXO3D Breakout Board

Board

MachXO3D Breakout Board

Small low-cost board with generous access to MachXO3D FPGA IO for general purpose evaluation and development
MachXO3D 
Breakout, Security, TOR Switch, Defense 
MachXO3D Breakout Board
MachXO3D Development Board

Board

MachXO3D Development Board

General purpose evaluation and development for MachXO3D with generous IO access and multiple expansion connectors RaspberryPi, Arduino, Lattice Versa, and more.
MachXO3D 
Arduino, Breakout, Raspberry Pi, Security, Hirose FX12, Versa Connector, TOR Switch 
MachXO3D Development Board
ECP5 Versa Development Kit

Board

ECP5 Versa Development Kit

Evaluate and develop for key connectivity features of the ECP5 FPGA, including PCI Express, Gigabit Ethernet, DDR3 and generic SERDES, includes numerous demos.
ECP5 / ECP5-5G 
Data Communication, Ethernet, PCIe, SERDES, SMA, Versa Connector, DDR SDRAM, TOR Switch, Guidance Systems 
ECP5 Versa Development Kit
LPTM21L Evaluation Board

Board

LPTM21L Evaluation Board

For evaluation and development with Platform Manager 2 devices.
Platform Manager 2 & L-ASC10 
Breakout, Mixed-Signal, Power Management, TOR Switch, Defense, I2C, JTAG 
LPTM21L Evaluation Board
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