I2C supporting popular Lattice FPGA families The I2C, or Inter-Integrated Circuit, is a two-wire interface capable of half-duplex serial communication at moderate to high speeds of up to a few megabits per second. The I2C incorporates an addressing system to identify the multiple I2C slaves on the I2C bus. The system utilizes two bidirectional lines, which are the SDA (Serial Data) and SCL (Serial Clock).
Includes source code compliant to I2C Specification This reference design implements an I2C Master Module on any Lattice FPGA using Lattice Diamond® 3.11 and Lattice Radiant® 2.1. It follows the I2C specification to provide device addressing, read/write operation, and an acknowledgement mechanism. It adds an instant I2C compatible interface to any component in the system.
Configure to match your system’s needs. The programmable nature of FPGA devices provides you with the flexibility of configuring the I2C master device to any legal slave address. This avoids the potential slave address collision on an I2C bus with multiple slave devices.