Smarter, Secure Datacenter Control with Lattice FPGAs

Powering the Future of Intelligent Datacenter Infrastructure

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MachXO3

As AI workloads grow in complexity and scale, datacenters must evolve to deliver faster, more secure, and more adaptive infrastructure. Lattice FPGAs offer a compelling solution – bringing low-latency control, hardware-level security, and flexible acceleration to the heart of AI-driven environments. Whether orchestrating edge inference, managing data pipelines, or securing model deployment, Lattice technology empowers datacenter architects to build intelligent systems that are ready for the future of AI.

Key features

Lattice FPGAs bring unmatched agility, security, and performance to server platforms with:

  • Instant-on, Low-latency Control – Execute sequencing, resets, and fault responses with zero boot delay.
  • Parallel Real-time Processing – Manage power, telemetry, and I/O tasks simultaneously – no firmware bottlenecks.
  • Protocol Bridging & I/O Consolidation – Bridge USB, SPI, I2C, RMII, and debug interfaces in one device – simplifying board design.
  • BOM Optimization – Replace MCUs, multiplexer, and discrete controllers to reduce cost and complexity.
  • Rapid Customization & Deployment – One bitstream supports multiple boards – accelerating innovation and SKU rollout.
  • PQC-compliant Platform Firmware Resilience (PFR) – Built-in cryptographic engines and secure boot support next-gen, quantum-resistant firmware protection.

Engineered for agility, security, and scale, Lattice FPGAs are the foundation for next-gen server control.
Datacenter Control and Security

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Block Diagram

Rack Optimized ServerExpand Image

Rack Optimized Server

  • Control PLD
  • Interposer Controller for HDD/NVMe
  • Host Bus Adapter Controller
  • Control PLD and ASC
  • BIOS, BMC Firmware Validation
  • LPC to SPI Bridge for TPM in China on "Purley" Reference Design
  • Various Riser Cards
  • I2C Buffer Between CPU & DDR

Example Solutions

Hot Swappable HDD/FD/ NVMe Drive Backplane ControllerExpand Image

Hot Swappable HDD/FD/ NVMe Drive Backplane Controller

  • Auto selection of control port from I2C, SGPIO between HDD/FD/NVMe drives
  • Scalable solution from 2 drives to 24 drives
  • Automatic color LED/ monochrome LED drive support
  • On-chip Flash and EBR for FRU data store
Host bus Adapter Logic IntegrationExpand Image

Host Bus Adapter Logic Integration

  • Integrate SGPIO and other out-of-band signaling
  • Power/reset sequencing and other control PLD functions, fast supply fault detect, initiate status save
  • On-chip Flash for fault logging, LED drives
  • In-system update through I2C with hitless I/O support
Control PLDExpand Image

Control PLD

  • Power and reset sequencing, thermal management
  • Out-of-band signaling aggregation including 1V signals from CPU
  • Glue logic (SPI, I2C, UART, GPIO, SGPIO, fan controller, debug port, JTAG Mux, etc.)
  • Modify algorithms without power-cycling using hitless updates
ASC to Control PLDExpand Image

ASC to Control PLD

  • Reduce the number of I2C buffers/Mux
  • No external ADC needed
  • Reduce the number of temperature sensing ICs
  • Reliable power-down sequencing
  • Reduced circuit board congestion
BIOS and BMC Firmware AuthenticationExpand Image

BIOS and BMC Firmware Authentication

  • Hardware Root-Of-Trust security
  • Validates the BIOS and BMC firmware using elliptic curve signature authentication
  • Manages automatic golden image switchover in the case of compromised active image
  • Incorruptible in-system
LPC to SPI Bridge for TPMExpand Image

LPC to SPI Bridge for TPM

  • Bridge between a single PCH interface and multiple TPM module interface
  • Compatible with wide range of operating frequencies at ingress and egress ports
I2C Buffer IntegrationExpand Image

I2C Buffer Integration

  • Multiple I2C buffers (PCA9617) for voltage level translation (CPU 1.05V to DDR4 1.2V)
  • Level translation for out-of-band 1V I/O signals from CPU
  • Multiple I2C Muxes
  • Multiple I2C GPIOs

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