Tablets

Driving Exceptional User Experiences In Next Generation Tablets

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Tablet architecture continues to evolve, adding more sensors, improving quality of existing sensors and displays which drive better user experience with crisp imagery and perfect details. In addition, device manufacturers are racing toward lower power consumption and slim size devices. Lattice FPGAs provide the bridging and distributed processing capabilities to elevate some of the challenges designer are facing on the road to innovative form factors with ultra slim designs.

Lattice’s solutions running on optimized low power FPGAs provide:

  • Flexible and low latency sensor data aggregation, bridging, data buffering and processing from a wide variety of sensors
  • MIPI CSI and DSI image sensor and display bridging
  • New form factors by improving board to board connectivity

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Block Diagram

Tablets

Example Use Cases

Sensor Fusion and I/O Expansion

  • Interface to a wide variety of sensors to create rich user experience
  • Flexible preprocessing including arbitration, time stamping, and filtering
  • Create programmable sensor fusion algorithms

Image Sensor Bridging

  • Connect wide a variety of image sensors to processors
  • MIPI PHY supports up to 2.5 Gbps/lane, up to four lanes
  • Flexible host interfacing including CSI, SPI, and PCIe
  • Flexible processing for video data muxing and Stitching

Display Bridging

  • Bridge between displays and processors when display interface is not supported native by the processor
  • Use the FPGA internal memory resources for compression and buffering
  • Expand the number of processor display interfaces

Reference Designs

MIPI CSI-2 to PCIe Reference Design

Reference Design

MIPI CSI-2 to PCIe Reference Design

CertusPro™‑NX MIPI CSI‑2 to PCIe reference design streams camera video to a PC via DMA on the Versa Board, with Linux drivers and capture‑to‑display demo.
MIPI CSI-2 to PCIe Reference Design
CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

Reference Design

CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

Modular MIPI/D-PHY Reference Design - Multiple channel image data concatenated horizontally line by line and offers up to eight-channel aggregation.
CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

Demos

IP Cores

MIPI CSI/DSI IP Core

IP Core

MIPI CSI/DSI IP Core

The MIPIĀ® CSI/DSI IP is the unified and re-architected MIPI IP that provides a flexible solution for transmission and reception of high-speed video data over a Mobile Industry Processor Interface (MIPI)-compatible D-PHY interface in FPGA designs.
MIPI CSI/DSI IP Core
CNN Plus Accelerator IP Core

IP Core

CNN Plus Accelerator IP Core

CNN Plus IP is a flexible accelerator IP that simplifies implementation of Ultra-Low power AI by leveraging capabilities of Lattice FPGAs.
CNN Plus Accelerator IP Core

Development Kits & Boards

CertusPro-NX Versa Board

Board

CertusPro-NX Versa Board

CertusPro-NX Versa Board supports a wide range industry standards such as MIPI, SFP+, 10 GbE, LPDDR4 and PCIe (Gen3) for rapid prototyping and testing.
CertusPro-NX Versa Board
Embedded Vision Development Kit

Board

Embedded Vision Development Kit

Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.
Embedded Vision Development Kit
CrossLink-NX Evaluation Board

Board

CrossLink-NX Evaluation Board

For general evaluation and development with CrossLink-NX, includes many flexible interfaces such as FMC and PMOD with generous device IO access
CrossLink-NX Evaluation Board
HM01B0 UPduino Shield

Board

HM01B0 UPduino Shield

A complete development kit for implementing Artificial Intelligence (AI) using vision and sound as sensory inputs to a low-cost, low-power iCE40 UltraPlus FPGA.
HM01B0 UPduino Shield

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