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  • Object Classification Demonstration

    Demo

    Object Classification Demonstration

    Sample demonstration for object detection, classification, and tracking multiple objects running on a low power general purpose FPGA using CNN Model
    Object Classification Demonstration
  • Object Classification Reference Design

    Reference Design

    Object Classification Reference Design

    A reference design for implementing object classification based on Mobilenet NN model running on Lattice CertusPro-NX low power FPGA
    Object Classification Reference Design
  • Human Face Identification Reference Design

    Reference Design

    Human Face Identification Reference Design

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.
    Human Face Identification Reference Design
  • Human Presence Detection

    Reference Design

    Human Presence Detection

    Uses Lattice sensAI IP to continuously search for the presence of a human and reports results. Can be adapted to detect any other object.
    Human Presence Detection
  • Human Counting AI Demo

    Demo

    Human Counting AI Demo

    Human upper-body detection and counting demonstration utilizes Lattice’s ECP5 FPGA and a Convolutional Neural Network (CNN) acceleration engine
    Human Counting AI Demo
  • Human Face Detection AI Demo

    Demo

    Human Face Detection AI Demo

    Uses Lattice sensAI IP to detect human faces on a tiny, low-power iCE40 UltraPlus FPGA implementing AI at the edge. Adaptable to detect other objects.
    Human Face Detection AI Demo
  • Human Presence Detection AI Demo

    Demo

    Human Presence Detection AI Demo

    Uses an artificial intelligence (AI) algorithm to detect human presence with either the powerful ECP5 FPGA, or small, low-power iCE40 UltraPlus FPGA.
    Human Presence Detection AI Demo
  • Package Detection AI Demo

    Demo

    Package Detection AI Demo

    Uses Convolutional Neural Network (CNN) Accelerator IP on the ECP5 FPGA to detect packages. Output is shown via HDMI with a bounding box drawn around packages.
    Package Detection AI Demo
  • Speed Sign Detection AI Demo

    Demo

    Speed Sign Detection AI Demo

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect speed limit signs and determine the indicated speed.
    Speed Sign Detection AI Demo
  • Vehicle Classification AI Demo

    Demo

    Vehicle Classification AI Demo

    Classifies vehicle types using a Convolutional Neural Network (CNN) Accelerator IP on the ECP5 FPGA. HDMI output uses color-coded bounding boxes.
    Vehicle Classification AI Demo
  • Ikva ML Accelerator IP Core

    IP Core

    Ikva ML Accelerator IP Core

    Powerful, scalable ML accelerator supporting 8-bit CNNs and 1-bit Binarized Neural Networks (BNNs), a rich software stack and computer vision models.
    Ikva ML Accelerator IP Core
  • DCA1000 Evaluation Module

    Board

    DCA1000 Evaluation Module

    The DCA1000EVM receives LVDS-format radar-sensing data and can stream over Ethernet in real-time. The board also connects to TI’s 77GHz xWR1xxx EVM.
    DCA1000 Evaluation Module
  • Machine Learning / On-device AI

    Reference Design

    Machine Learning / On-device AI

    Uses artificial intelligence (AI) to implement a human detection algorithm
    Machine Learning / On-device AI
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