Human Face Identification Demonstration

Lattice sensAI Demo

Programmable Solution- Implemented on a Lattice low power FPGA, the demo uses machine learning to identify different human faces. A CNN acceleration engine is trained to deliver accurate identification by extracting 256 16-bit characteristics from each registered face.

In-field Registration- The demo can register and identify faces without the need for retraining, removing the need for uploading images and lengthy retraining using a GPU.

Rapid Implementation- The demo’s development boards support RTL blocks for the 8-layer CNN accelerator, image sensor connectivity and setup, and image sensor processor and memory management or easy modification.

Features

  • VGG8-like CNN trained to recognize human faces using measurement points
  • In-field new face registration and identification without the need to retrain the network
  • Supports performance of up to 30 frames per second
  • Power consumption: 850 mW on Lattice ECP5 85K FPGAs and 200mW on Lattice CrossLink-NX 40K FPGAs

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Documentation

Quick Reference
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
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CrossLink-NX QVGA Mobilenet Human Identification on VVML Board Demonstration - User Guide
FPGA-UG-02141 1.0 11/10/2021 PDF 1.6 MB
EVDK Based Human Face Identification Demostration Bitstream User Guide
FPGA-UG-02092 1.0 9/9/2019 PDF 1.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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EVDK Based Human Face Identification Demostration Bitstream
1.0 9/9/2019 ZIP 12 MB
CrossLink-NX ROI Face ID Using VVML Board Demonstration
6/7/2022 ZIP 3.2 MB

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