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  • Hand Gesture Detection

    Reference Design

    Hand Gesture Detection

    Implements a low power AI based system to detect hand gestures using an IR image sensor
    Hand Gesture Detection
  • Key Phrase Detection

    Demo

    Key Phrase Detection

    Uses artificial intelligence (AI) to detect a specific key-phrase using a tiny, low-power iCE40 UltraPlus FPGA
    Key Phrase Detection
  • Key Phrase Detection

    Reference Design

    Key Phrase Detection

    Continuous searches for a key phrase utterance via a digital MEMS microphone. Can be re-configured to work with any trained word or phrase.
    Key Phrase Detection
  • Human Presence Detection

    Reference Design

    Human Presence Detection

    Uses Lattice sensAI IP to continuously search for the presence of a human and reports results. Can be adapted to detect any other object.
    Human Presence Detection
  • CNN Compact Accelerator IP

    IP Core

    CNN Compact Accelerator IP

    Implement AI solutions with CNNs or BNNs that have power consumption in the mW range. Works with Lattice Neural Network Compiler software tool.
    CNN Compact Accelerator IP
  • Hand Gesture Detection

    Demo

    Hand Gesture Detection

    Uses artificial intelligence (AI) to implement hand gesture detection algorithm using a tiny, low-power iCE40 UltraPlus FPGA
    Hand Gesture Detection
  • HM01B0 UPduino Shield

    Board

    HM01B0 UPduino Shield

    A complete development kit for implementing Artificial Intelligence (AI) using vision and sound as sensory inputs to a low-cost, low-power iCE40 UltraPlus FPGA.
    HM01B0 UPduino Shield
  • Human Face Detection

    Demo

    Human Face Detection

    Uses Lattice sensAI IP to detect human faces on a tiny, low-power iCE40 UltraPlus FPGA implementing AI at the edge. Adaptable to detect other objects.
    Human Face Detection
  • Human Presence Detection

    Demo

    Human Presence Detection

    Uses an artificial intelligence (AI) algorithm to detect human presence with either the powerful ECP5 FPGA, or small, low-power iCE40 UltraPlus FPGA.
    Human Presence Detection
  • iCE40 UPduino Board

    Board

    iCE40 UPduino Board

    Low-cost evaluation and development base platform for iCE40 UltraPlus, connects to Arduino ecosystem. Expansion boards are available.
    iCE40 UPduino Board
  • DPControl iCEVision Board

    Board

    DPControl iCEVision Board

    A highly flexible and expandable prototyping platform for vision based AI and many other applictions
    DPControl iCEVision Board
  • iCE40 UltraPlus Breakout Board

    Board

    iCE40 UltraPlus Breakout Board

    General purpose board for evaluation and development with iCE40 UltraPlus. Includes access to all IO, high-current LED, switches, etc.
    iCE40 UltraPlus Breakout Board
  • Single Wire Aggregation

    Reference Design

    Single Wire Aggregation

    Use a low-cost FPGA to aggregate multiple data streams such as I2C, UART, I2S and GPIO in TDM fashion, transmit a over single wire, and de-aggregate.
    Single Wire Aggregation
  • Single Wire Aggregation Demo / Development Board

    Board

    Single Wire Aggregation Demo / Development Board

    Use the world’s smallest form factor FPGAs to aggregate multiple data streams such as I2C, I2S and GPIO in TDM fashion, transmit over single wire, and de-aggregate.
  • 8N1 UART Transceiver Reference Design

    Reference Design

    8N1 UART Transceiver Reference Design

    8-bit data, no parity, and 1 stop bit Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel and parallel to serial conversions on data characters received from a peripheral device or CPU
    8N1 UART Transceiver Reference Design
  • Soft I2C Bus Master

    Reference Design

    Soft I2C Bus Master

    Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families
    Soft I2C Bus Master
  • Soft I2C Master and Slave – Simple Write and Read

    Demo

    Soft I2C Master and Slave – Simple Write and Read

    Demonstrates the operation of an I2C Master and Slave doing simple write and read of data.
    Soft I2C Master and Slave – Simple Write and Read
  • Soft I2C Slave Peripheral

    Reference Design

    Soft I2C Slave Peripheral

    Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families
    Soft I2C Slave Peripheral
  • GPIO IP Core

    IP Core

    GPIO IP Core

    Detects and controls GPIOs via Lattice Memory Mapped Interface (LMMI) or Advanced Peripheral Bus Interface (APB).
    GPIO IP Core
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