USB 2.0 Device with FIFO Interface (USB20HF)

USB20HF IP Core provides FIFO interface supporting High Speed (480 Mbps) and Full Speed (12 Mbps) and Low Speed (1.5 Mbps) functionality

Software Independent – In this IP core, processor would not be needed at all. The endpoint 0 (default control endpoint) is managed by the IP Core itself. Hence, user does not have to bother regarding endpoint 0 management.

FIFO Interface - For non-zero endpoint, there is a FIFO interface. User needs to manage this FIFO interface for a data transfer over non-zero endpoint via simple RTL coding.

Application - This flavour of IP Core is well suited in the application where there is no processor. It means, everything about the IP Core is being managed via RTL. This flavour is recommended for device with vendor specific class with limited control transfer support requirement.


  • Supports LS (1.5 Mbps), FS (12 Mbps) and HS (480 Mbps) modes
  • Supports Control, Bulk, Interrupt and Isochronous transfers
  • Capable to support up to 31 endpoints (1 default control endpoint +15 IN/OUT endpoints)
  • Implemented in verilog RTL
  • Ready to use component