Lattice Solutions

IP Core

​​eSPI Target IP Core​

​​Lattice eSPI Target IP Core is compliant with the Intel eSPI specifications & has its own virtual wire channel in the user interface.​

MachXO5-NX, Mach-NX, MachXO3D, MachXO3, MachXO2 

APB, AHB-Lite, Lattice Sentry 

IP Core

PCI Express for Nexus FPGAs

The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 

APB, AHB, AHB-Lite, RTL, PCI, PCIe, Bus Controllers, Defense, Automotive, PCIe Bundle, SDR 

IP Core

Lattice Sentry PLD Interface IP Core

Lattice Semiconductor Customer Programmable Logic Devices (PLD)implements a bidirectional mailbox for sending and receiving messages.

Mach-NX, MachXO5-NX 

AHB-Lite, APB, FPGA, RTL, Lattice Propel, PLD, Lattice Sentry, Lattice Sentry PFR IP Package, Security 

IP Core

Timer/Counter IP Core

The Lattice Semiconductor Timer/Counter IP is used to track timeouts in the system, and it generates an interrupt to the CPU when a timeout is detected.

Certus-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, CertusPro-NX, CrossLink, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 LP/HX, iCE40 Ultra / UltraLite, iCE40 UltraPlus, LatticeECP2/M, LatticeECP3, LatticeSC/M, LatticeXP2, Mach-NX, MachXO, MachXO2, MachXO3, MachXO3D, MachXO5-NX, Certus-N2 

AMBA, Lattice Propel, Lattice Diamond, Lattice Radiant, APB, AHB-Lite, Lattice Sentry, Lattice Sentry PFR IP Package, Security 

IP Core

Lattice Sentry ESB Mux IP Core for MachXO3D

Propel IP Module for Lattice Sentry: Enables access the MachXO3D embedded security block (ESB) simultaneously with internal crytographic operations

MachXO3D 

AMBA, APB, Security, Lattice Sentry PFR IP Package, Lattice Sentry, Lattice Propel 

IP Core

Lattice Sentry I2C Monitor IP Core for MachXO3D

Propel IP Module for Lattice Sentry: Monitors traffic on I2C bus to identify and block potentially illegal traffic.

MachXO3D 

APB, AMBA, Lattice Sentry PFR IP Package, Security, I2C, Lattice Propel, Lattice Sentry 

IP Core

Lattice Sentry QSPI Monitor IP Core for MachXO3D

Propel IP Module for Lattice Sentry: Monitors traffic on SPI/QSPI bus to identify and block potentially illegal traffic.

MachXO3D 

APB, SPI, Security, Lattice Sentry PFR IP Package, Lattice Sentry, Lattice Propel, Defense 

IP Core

Lattice Sentry QSPI Streamer IP Core for MachXO3D

Propel IP Module for Lattice Sentry: Provides fast SPI memory access for firmware authentication as part fo Platform Root of Trust operation

MachXO3D 

AMBA, Lattice Propel, APB, Lattice Sentry PFR IP Package, SPI, Lattice Sentry, Security 

IP Core

AXI4 to APB Bridge Module

The Lattice Semiconductor AXI4 to APB Bridge Module provides an interface between the high-speed AXI4 and APB.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

APB, AXI4, Lattice Avant, Lattice Propel 

IP Core

​​M-PESTI Initiator IP Core​

​​The Lattice M-PESTI IP core provides early peripheral presence detection and attribute collection before system boot up.​

Certus-N2, Avant-G, Avant-X, Avant-E, MachXO5-NX, MachXO3D, MachXO3, Mach-NX 

MPESTI, UART, APB, Lattice Sentry 

Reference Design

MPESTI Initiator Reference Design

MPESTI Initiator Reference Design provides the solution template which is compliant with the MPESTI Base Specification.

Avant-E, MachXO5-NX, MachXO3, MachXO3D 

MPESTI, UART, APB, AHB, RISC-V 

Reference Design

TSEMAC & SGMII Reference Design

Lattice TSEMAC & SGMII Reference Design implements 1G/100M/10M Ethernet application using a TSEMAC IP Core with a SGMII PCS IP Core in loopback mode.

CertusPro-NX, CrossLink-NX 

Ethernet, X/S/RGMII, TSEMAC, APB 

Reference Design

APB to AHB-Lite Bridge Reference Design

The APB to AHB-Lite Bridge Reference Design provides an interface between the low power APB and the high-speed AHB-Lite.

MachXO3D, MachXO3, MachXO2 

APB, AHB, AMBA 

IP Core

DC-SCM LVDS Tunneling Protocol and Interface IP Core

LTPI IP Core is an Open Computer Project Data Center – Secure Control Module Standards compatible solution which is introduced in the DC-SCM 2.0 Specification.

MachXO3, MachXO3D, MachXO5-NX, Mach-NX 

CRC, LVDS, LTPI, AMBA, APB, Lattice Diamond, Lattice Radiant, Lattice Sentry 

Reference Design

LVDS Tunneling Protocol and Interface Reference Design

The DC-SCM 2.0 LTPI Reference Design provides multiple solution compliant with DC-SCM 2.0 with a standardized DC-SCI and aggregating multiple data channels.

MachXO5-NX, MachXO3D, MachXO3, Mach-NX 

CRC, LVDS, I2C, GPIO, UART, LTPI, AMBA, APB, Lattice Diamond, Lattice Propel 

Reference Design

I2C to APB Bridge Reference Design

With support APB read / write capability, the I2C to APB Bridge Reference Design converts external I2C Master into APB Master transaction.

MachXO2, MachXO3, MachXO3D 

I2C, APB, AMBA, AHB 

IP Core

10Gb Ethernet PCS IP Core

The Lattice 10 Gb Ethernet PCS IP Core is a programmable hardware element that offers dependable 10GbE network connectivity with FEC, scrambling, and CDR.

CertusPro-NX 

Ethernet, APB, PCS 

IP Core

MDIO Leader IP Core

MDIO LEADER IP features three different standard interfaces for accessing the control and status signals of Leader: APB, AHB-L and AXI-L.

Avant-E, CertusPro-NX, Certus-N2, Avant-G, Avant-X 

Bus Controllers, Ethernet, IEEE 802.3, APB, AHB-L, AXI-Lite Interface 

IP Core

Memory Controller IP Core

The Memory Controller IP reduces the effort required to integrate the LPDDR4 memory controller with the user application design.

CertusPro-NX, Avant-E, Avant-G, Avant-X, MachXO5-NX, Certus-N2 

LPDDR4, DDR SDRAM, APB, AHB, Memory Controller, Automotive, Memory Controller Bundle, Lattice Drive 

IP Core

SLVS-EC Receiver IP Core

The SLVS-EC RX IP provides the FPGA an interface to receive serial data from CMOS Image Sensors and offers a solution to convert the incoming serial data to a parallel pixel data format.

CertusPro-NX 

SLVS-EC, APB, AHB, AMBA, PMA, PCS, MPCS