AXI4 to APB Bridge Module

Interface Between the High-speed AXI4 and APB

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The Lattice Semiconductor AXI4 to APB Bridge core is used to connect AXI4 manager to APB completer. Read and write transfers on the AXI4 bus are converted into corresponding transfers on the APB.

Resource Utilization details are available in the IP Core User Guide.

Features

  • Compliance with AMBA AXI4 and APB3 Protocol
  • Support configurable data bus width: 8,16 and 32
  • Support configurable AXI4 ID width: 1 to 11
  • Support configurable AXI4 User width: 1 to 128

Jump to

Block Diagram

AXI4 to APB Bridge ModuleExpand Image

Ordering Information

The AXI4 to APB Bridge Module is provided at no additional cost with Lattice Propel Builder.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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AXI4 to APB Bridge Module User Guide
FPGA-IPUG-02198 1.4 12/20/2024 PDF 383.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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AXI4 to APB Bridge Module Release Notes
FPGA-RN-02047 1.0 12/20/2024 PDF 214 KB

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