Lattice Solutions

Demo

PCIe Basic Demo for Lattice Nexus-based FPGAs

The PCIe Basic Demo allows you to control three 7 segment LEDs and manipulate the onboard memory of the FPGA through the PCIe slot.

CrossLink-NX, Certus-NX, CertusPro-NX 

SPI, Camera, CSI Camera, Ethernet, PCIe, PMOD, RJ-45, X/S/RGMII, UAVs, Automotive, Bus Controllers, Defense, LED, Nexus PCIe 

Demo

PCIe Colorbar Demo for Lattice Nexus-based FPGAs

PCIe Colorbar Demo displays a series of moving colorbars by streaming the image data using DMA transfers from the FPGA to the host system.

CrossLink-NX, Certus-NX, CertusPro-NX 

SPI, Camera, CSI Camera, Ethernet, PCIe, PMOD, RJ-45, X/S/RGMII, UAVs, Automotive, Bus Controllers, Defense, LED, Nexus PCIe 

Demo

PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

The PCI Express DMA Throughput Demo allows to initiate DMA read and write transactions, transferring data from the host to the FPGA and vice versa.

CrossLink-NX, Certus-NX, CertusPro-NX 

SPI, Camera, CSI Camera, Ethernet, PCIe, PMOD, RJ-45, X/S/RGMII, UAVs, Automotive, Bus Controllers, Defense, LED, Nexus PCIe 

Demo

PCIe Multifunction Demo for Lattice Nexus-based FPGAs

Demonstrates the multifunction capabilities of the Crosslink-NX FPGA that allows access to GPIO, MDIO and I2C registers.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 

SPI, Camera, CSI Camera, Ethernet, PCIe, PMOD, RJ-45, X/S/RGMII, UAVs, Automotive, Bus Controllers, Defense, I2C, LED, GPIO, Nexus PCIe 

IP Core

PCI Express for Nexus FPGAs

The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 

APB, AHB, AHB-Lite, RTL, PCI, PCIe, Bus Controllers, Defense, Automotive, PCIe Bundle, SDR 

IP Core

PCI Express for Avant FPGAs

The Lattice PCIe X8 IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.

Avant-G, Avant-X 

AXI, AHB, AHB-Lite, RTL, PCIe, Bus Controllers, Defense, Automotive, Lattice Avant, PCI, PCIe Bundle, SDR 

Demo

Single Wire Signal Aggregation Demonstration

Single Wire Signal Aggregation Demonstration contains two boards to demonstrate the complete working design in a stand-alone configuration.

iCE40 UltraPlus 

Single Wire, Signal Aggregation, Bus Controllers, GPIO, I2C, I2S, UART, Defense 

Reference Design

Single Wire Signal Aggregation Reference Design

Single Wire Signal Aggregation Reference Design is configurable, the number of I2C/I2S busses and GPIOs and single wire protocol packet length can be adjusted.

iCE40 UltraPlus 

Bus Controllers, Signal Aggregation, Single Wire, Defense 

IP Core

​​I3C Filter IP Core​

​​The Lattice I3C Filter IP functions as an invisible relay from the point of view of the Controller and Target devices on the bus.​

MachXO5-NX 

I3C, Bus Controllers, MIPI Bundle, SMBus, RISC-V 

IP Core

I3C Controller IP Core

I3C Controller IP Core is a two-wire, bi-directional serial bus designed for use with many sensor secondary devices controlled by a single I3C controller.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, iCE40 UltraPlus, Avant-E, Avant-G, Avant-X 

I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive, MIPI Bundle 

IP Core

I3C Target IP Core

I3C Target IP Core enables greater than 10-fold speed improvements, more effective bus power management, and backward compatibility with I2C devices.

CertusPro-NX, CrossLink-NX, Certus-NX, MachXO5-NX, iCE40 UltraPlus, Avant-E, Avant-G, Avant-X 

I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive, MIPI Bundle 

IP Core

Flash Access IP Core

The Flash Access for MachXO5-NX IP Core enables you to perform write and read access to the internal flash memory of LFMXO5-25 device.

MachXO5-NX 

Bus Controllers, Security, Automotive, Flash, Timer, Memory Controller, Lattice Radiant 

IP Core

MDIO Leader IP Core

MDIO LEADER IP features three different standard interfaces for accessing the control and status signals of Leader: APB, AHB-L and AXI-L.

Avant-E, CertusPro-NX 

Bus Controllers, Ethernet, IEEE 802.3, APB, AHB-L, AXI-Lite Interface 

Board

Single Wire Signal Aggregation Development Board

Single Wire Signal Aggregation Dev Board uses the smallest form factor FPGAs to perform as a Single-Wire aggregator for I2C, I2S, UART, & GPIO signaling.

iCE40 UltraPlus 

Single Wire, Signal Aggregation, Bus Controllers, GPIO, I2C, I2S, UART, Defense 

Reference Design

8N1 UART Transceiver Reference Design

8-bit data, no parity, and 1 stop bit Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel and parallel to serial conversions on data characters received from a peripheral device or CPU

iCE40 UltraPlus, MachXO2 

UART, Bus Controllers, TOR Switch 

Reference Design

Soft I2C Bus Master

Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3, Mach-NX 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 

Demo

Soft I2C Master and Slave – Simple Write and Read

Demonstrates the operation of an I2C Master and Slave doing simple write and read of data.

iCE40 UltraPlus, MachXO3 

Computing, IoT, TOR Switch, Bus Controllers, I2C 

Reference Design

Soft I2C Slave Peripheral

Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 

IP Core

GPIO IP Core

General Purpose Input/Output (GPIO) peripheral Soft IP is designed to control GPIOs via LMMI or APB.

CertusPro-NX, Certus-NX, CrossLink-NX, Mach-NX, iCE40 UltraPlus, MachXO5-NX, Avant-E, Avant-G, Avant-X 

GPIO Control, APB, Bus Controllers, TOR Switch, Automotive 

IP Core

SPI Controller IP Core

Lattice SPI Controller IP Core is used to communicate with external SPI Target devices such as display drivers, SPI EPROMS, and analog-to-digital converters.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X 

SPI, AHB-Lite, APB, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, Automotive