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  • Embedded Vision Development Kit

    Board

    Embedded Vision Development Kit

    Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.
    CrossLink, ECP5 / ECP5-5G 
    3D Video, Camera, DDR SDRAM, HDMI, Image Processing, Machine Learning/AI, Lattice sensAI, Signal Aggregation, Video Tx/Rx, VIP, Lattice mVision, IoT & Wearables, Smart Toys & Robots, Home Control Appliances & Security, Notebooks & PCs, Tablets, Printers, AR / VR & Drones, UAVs 
    Embedded Vision Development Kit
  • Single Wire Signal Aggregation Demonstration

    Demo

    Single Wire Signal Aggregation Demonstration

    Single Wire Signal Aggregation Demonstration contains two boards to demonstrate the complete working design in a stand-alone configuration.
    iCE40 UltraPlus 
    Single Wire, Signal Aggregation, Bus Controllers, GPIO, I2C, I2S, UART, Defense 
    Single Wire Signal Aggregation Demonstration
  • Single Wire Signal Aggregation Reference Design

    Reference Design

    Single Wire Signal Aggregation Reference Design

    Single Wire Signal Aggregation Reference Design is configurable, the number of I2C/I2S busses and GPIOs and single wire protocol packet length can be adjusted.
    iCE40 UltraPlus 
    Bus Controllers, Signal Aggregation, Single Wire, Defense 
    Single Wire Signal Aggregation Reference Design
  • 4 to 1 Image Aggregation with CrossLink-NX

    Reference Design

    4 to 1 Image Aggregation with CrossLink-NX

    Modular MIPI/D-PHY Reference Design - Aggregates four MIPI CSI-2 inputs to a single output stream.
    CrossLink-NX 
    MIPI, CSI-2, Modular MIPI/D-PHY, Lattice mVision, Video Aggregation, Signal Aggregation, Video Tx/Rx, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Automotive 
    4 to 1 Image Aggregation with CrossLink-NX
  • MIPI CSI-2 Virtual Channel Aggregation Reference Design

    Reference Design

    MIPI CSI-2 Virtual Channel Aggregation Reference Design

    Modular MIPI/D-PHY Reference Design - Adaptable and flexible solution combines multiple MIPI CSI-2 inputs to a single CSI-2 output stream.
    CrossLink, CrossLinkPlus, CrossLink-NX 
    CSI-2, MIPI, Modular MIPI/D-PHY, Lattice mVision, Signal Aggregation, Video Tx/Rx, Video Aggregation, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, Automotive 
    MIPI CSI-2 Virtual Channel Aggregation Reference Design
  • N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Reference Design

    N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Modular MIPI/D-PHY Reference Design - Aggregate multiple MIPI CSI-2 inputs up to 5 channels horizontally line by line to a single CSI-2 output
    CrossLink, CrossLinkPlus, CrossLink-NX 
    CSI-2, MIPI, Modular MIPI/D-PHY, Lattice mVision, Signal Aggregation, Video Tx/Rx, Video Aggregation, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, Automotive 
    N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation
  • Single Wire Signal Aggregation Development Board

    Board

    Single Wire Signal Aggregation Development Board

    Single Wire Signal Aggregation Dev Board uses the smallest form factor FPGAs to perform as a Single-Wire aggregator for I2C, I2S, UART, & GPIO signaling.
    iCE40 UltraPlus 
    Single Wire, Signal Aggregation, Bus Controllers, GPIO, I2C, I2S, UART, Defense 
  • 8 to 1 Microphone Aggregator Board

    Board

    8 to 1 Microphone Aggregator Board

    Daughter board for iCE40 UltraPlus Mobile Development Platform (MDP) for aggregation of up to eight PDM I2S microphones.
    iCE40 UltraPlus 
    Beam Forming, Microphone, Signal Aggregation, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
    8 to 1 Microphone Aggregator Board
  • PDM Microphone Aggregation

    Reference Design

    PDM Microphone Aggregation

    Aggregate up to 8 PDM microphones and connection to a processor over I2S or SPI with no impact in audio quality. Ideal for beam-forming. PCM output at 48HKz.
    iCE40 UltraPlus 
    Beam Forming, I2S, Microphone, PDM, Signal Aggregation, SPI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs 
    PDM Microphone Aggregation
  • Sensor Data Buffer Reference Design

    Reference Design

    Sensor Data Buffer Reference Design

    Interfaces between multiple I2C-based sensors and a processor's UART. Saves power and resources by always collecting data, while the processor sleeps.
    iCE40 UltraPlus 
    I2C, Signal Aggregation, UART, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
    Sensor Data Buffer Reference Design
  • Sensor Interfacing and Preprocessing

    Reference Design

    Sensor Interfacing and Preprocessing

    Aggregates data from multiple I2C interfaces and performs preprocessing like buffering, timestamping and complex event triggering based on data analysis.
    iCE40 UltraPlus, iCE40 Ultra / UltraLite, iCE40 LP/HX 
    Accelerometer, Compass, Gyroscope, I2C, IrDA, Pressure Sensor, Signal Aggregation, SPI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Space 
    Sensor Interfacing and Preprocessing
  • LPC (Low Pin Count) Bus Controller

    Reference Design

    LPC (Low Pin Count) Bus Controller

    Implements a Low Pin Count bus controller - based on the Intel Low Pin Count Interface Specification (version 1.1)
    MachXO2, LatticeXP2, LatticeECP3, ispMACH 4000ZE, MachXO 
    Bus Controllers, LPC, Signal Aggregation, TOR Switch 
    LPC (Low Pin Count) Bus Controller
  • SPI GPIO Expander

    Reference Design

    SPI GPIO Expander

    Expand microprocessor general purpose I/O ports with a Serial Peripheral Interface (SPI)
    Platform Manager, MachXO, ispMACH 4000ZE 
    GPIO Control, Signal Aggregation, Soft Processor, SPI, TOR Switch 
    SPI GPIO Expander
  • GPIO Expander

    Reference Design

    GPIO Expander

    Provides a solution that uses a Lattice PLD as a GPIO Expander
    LatticeECP3, MachXO, LatticeXP2, ispMACH 4000ZE, Platform Manager 
    GPIO Control, Signal Aggregation, TOR Switch 
    GPIO Expander
  • 7:1 LVDS Video Interface

    Reference Design

    7:1 LVDS Video Interface

    Implements standard 7:1 LVDS interfaces using the FPGA I/O structure
    LatticeECP3, LatticeECP2/M, LatticeXP2 
    LVDS Video, Signal Aggregation, Video Tx/Rx, Automotive 
    7:1 LVDS Video Interface
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