Source synchronous interfaces consisting of multiple data bits and clocks have become a common method for moving image data within electronic systems. A prevalent standard is the 7:1 LVDS interface (employed in Channel Link, Flat Link, and Camera Link), which has become a common standard in many electronic products including consumer devices, industrial control, medical, and automotive telematics. Lattice's 7:1 LVDS Video Interface Reference Design has been optimized for use with the LatticeECP3, LatticeECP2/M, and LatticeXP2 FPGA families. The reference design implements standard 7:1 LVDS interfaces using the FPGA I/O structure. Transmit and receive interfaces are fully and efficiently implemented by specifically taking advantage of dedicated LVDS I/O, the generic DDR I/O interface, gearing, and PLL clocking of edge and system clocks. Data formatting is also accomplished using dedicated deserializer modules.
Lattice 7:1 LVDS Video Demo Kit
The Lattice 7:1 LVDS Video Demo Kit is a set of boards and cables that demonstrate the implementation of a 7:1 LVDS solution using the LatticeECP2 or LatticeXP2 FPGA. The kit works with the LatticeECP2 or LatticeXP2 Advanced evaluation boards, as well as various user video I/O resources.