LatticeECP2/M

Redefine the value / cost equation

Related Products

Redefining the FPGA application space – With up to 95 K LUTs and up to 5.3 Mbit block and Distributed RAM the LatticeECP2 and LatticeECP2M families integrate capabilities previously only found on higher cost FPGAs.

High speed SERDES with PCS – High jitter tolerant, low transmission SERDES with PCS blocks can be configured to support an array of popular data protocols including PCI Express, Ethernet (1 GbE and SGMII), OBSAI and CPRI.

Performance without the power drain – Using just 0.35 W static power, you’d be forgiven for thinking that the LatticeECP2/M families couldn’t support up to 840 Mbps LVDS IO, DDR1/2 at 533 Mbps, and SPI4.2 at 750 Mbps – but they can.

Features

  • Embedded SERDES supports data rates up to 3.125 Gbps (LatticeECP2M only)
  • Up to 42 sysDSP™ blocks for high performance multiply and accumulate
  • 55 Kbits to 5308 Kbits sysMEM™ Embedded Block RAM (EBR)
  • sysCLOCK Analog PLLs and DLLs enable clock multiply, divide, phase & delay adjust
  • Available in TQFP, PQFP and fpBGA, packages

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Family Table

LatticeECP2 (including "S-Series") Device Selection Guide

Parameters ECP2-6 ECP2-12 ECP2-20 ECP2-35 ECP2-50 ECP2-70
LUTs (K) 6 12 21 32 48 68
EBR SRAM Blocks 3 12 15 18 21 56
EBR SRAM (Kbits) 55 221 276 332 387 1032
Distributed RAM (Kbits) 12 24 42 64 96 136
18 x 18 Multipliers 12 24 28 32 72 88
DLL + PLL 2 + 2 2 + 2 2 + 2 2 + 2 4 + 2 6 + 2
DDR Support DDR2 533, DDR 400
Boot Flash External External External External External External
Dual Boot Yes Yes Yes Yes Yes Yes
Bit-stream Encryption SE only SE only SE only SE only SE only SE only
Core Vcc 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V
Temp C Yes Yes Yes Yes Yes Yes
Temp I Yes Yes Yes Yes Yes Yes
1.0 mm Spacing I/O Count / SERDES
  ECP2-6 ECP2-12 ECP2-20 ECP2-35 ECP2-50 ECP2-70
144-pin TQFP (20 x 20 mm) 90 93
208-pin PQFP (28 x 28 mm) 131 131
256-ball fpBGA (17 x 17 mm) 190 193 193
484-ball fpBGA (23 x 23 mm) 297 331 331 339
672-ball fpBGA (27 x 27 mm) 402 450 500 500
900-ball fpBGA (31 x 31 mm) 583

LatticeECP2M (including "S-Series") Device Selection Guide

Parameters ECP2M-20 ECP2M-35 ECP2M-50 ECP2M-70 ECP2M-100
LUTs (K) 19 34 48 67 95
EBR SRAM Blocks 66 114 225 246 288
EBR SRAM (Kbits) 1217 2101 4147 4534 5308
Distributed RAM (Kbits) 41 71 101 145 202
18 x 18 Multipliers 24 32 88 96 168
3.2 Gbps SERDES Channels 4 4 8 16 16
PLL + DLL 8 + 2 8 + 2 8 + 2 8 + 2 8 + 2
DDR Support DDR2 533, DDR 400
Boot Flash External External External External External
Dual Boot Yes Yes Yes Yes Yes
Bit-stream Encryption SE only SE only SE only SE only SE only
Core Vcc 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V
Temp C Yes Yes Yes Yes Yes
Temp I Yes Yes Yes Yes Yes
1.0 mm Spacing I/O Count / SERDES
  ECP2M-20 ECP2M-35 ECP2M-50 ECP2M-70 ECP2M-100
256-ball fpBGA (17 x 17 mm) 140 / 4 140/4
484-ball fpBGA (23 x 23 mm) 304 / 4 303 / 4 270 / 4
672-ball fpBGA (27 x 27 mm) 410 / 4 372 / 8
900-ball fpBGA (31 x 31 mm) 410 / 8
 416 / 16
 416 / 16
1152-ball fpBGA (35 x 35 mm) 436 / 16 520 / 16

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