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  • Object Classification Demonstration

    Demo

    Object Classification Demonstration

    This object classification demo provides a sample application for detecting, classifying, and tracking multiple objects running on CertusPro-NX FPGA.
    CertusPro-NX, Avant-E 
    Machine Learning/AI, Lattice sensAI, Object Detection, Object Identification, Space 
    Object Classification Demonstration
  • Object Classification Reference Design

    Reference Design

    Object Classification Reference Design

    The Object Classification reference design shows examples on implementing machine-learning based object classification to edge devices applications.
    CertusPro-NX, Avant-E, CrossLink-NX 
    Machine Learning/AI, Lattice sensAI, Object Detection, Object Identification, Space 
    Object Classification Reference Design
  • Lattice Image Signal Processing Demo

    Demo

    Lattice Image Signal Processing Demo

    Provides a complete ISP example design on the Lattice ECP5 FPGA for the Embedded Vision Development Kit, ideal for Industrial, Medical, and Automotive applications.
    ECP5 / ECP5-5G, CertusPro-NX 
    Image Signal Processing, Lattice mVision, Space, Defense 
    Lattice Image Signal Processing Demo
  • CertusPro-NX Voice and Vision Machine Learning Board

    Board

    CertusPro-NX Voice and Vision Machine Learning Board

    Design AI use cases for the Edge quickly! This board along with the Lattice sensAI solution stack provide the tools for developing vision and audio-based AI applications.
    CertusPro-NX 
    Machine Learning/AI, DSP, PMOD, Camera, Lattice sensAI, Space, Automotive 
    CertusPro-NX Voice and Vision Machine Learning Board
  • Byte to Pixel Converter IP Core

    IP Core

    Byte to Pixel Converter IP Core

    Byte-to-Pixel Converter IP converts CSI-2/DSI standard based video payload packets from D-PHY Receiver Module output to pixel format.
    CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX, Avant-G, Avant-X 
    MIPI, Modular MIPI/D-PHY, Parallel Video, Video Tx/Rx, Lattice mVision, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space, MIPI Bundle 
    Byte to Pixel Converter IP Core
  • CSI-2/DSI D-PHY Transmitter IP Core

    IP Core

    CSI-2/DSI D-PHY Transmitter IP Core

    The CSI-2/DSI D-PHY Transmitter Submodule IP is for applications requiring D-PHY transmitter in the FPGA logic & supports both high-speed & low power modes
    Avant-E, Avant-G, Avant-X, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 
    CSI-2, DSI, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space, MIPI Bundle 
    CSI-2/DSI D-PHY Transmitter IP Core
  • UART 16550 IP Core

    IP Core

    UART 16550 IP Core

    ​​Lattice UART16550 IP Core is designed for use in serial communication, supporting the RS-232, RS-422, RS-485, and Electronic Industries Association (EIA) standards, among others.​
    iCE40 UltraPlus, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 
    Bus Controllers, UART, TOR Switch, Guidance Systems, Automotive, Space 
    UART 16550 IP Core
  • Sensor Interfacing and Preprocessing

    Reference Design

    Sensor Interfacing and Preprocessing

    Aggregates data from multiple I2C interfaces and performs preprocessing like buffering, timestamping and complex event triggering based on data analysis.
    iCE40 UltraPlus, iCE40 Ultra / UltraLite, iCE40 LP/HX 
    Accelerometer, Compass, Gyroscope, I2C, IrDA, Pressure Sensor, Signal Aggregation, SPI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Space 
    Sensor Interfacing and Preprocessing
  • SPI Slave to PWM Generation Reference Design

    Reference Design

    SPI Slave to PWM Generation Reference Design

    Sets the frequency and duty cycle of a PWM (Pulse-Width Modulator) using data from an external SPI master.
    MachXO2, iCE40 UltraPlus 
    SPI, PWM, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Space 
    SPI Slave to PWM Generation Reference Design
  • ADC Interface

    Reference Design

    ADC Interface

    Interfaces with the Texas Instruments (TI) ADS64XX family of ADCs via LatticeECP3 FPGA high-speed LVDS I/O
    LatticeECP3, LatticeECP2/M 
    ADC/DAC, Guidance Systems, Space 
    ADC Interface
  • ECC Module Reference Design

    Reference Design

    ECC Module Reference Design

    Provides Single Error Correction - Double Error Detection (SECDED) capability based on a class of optimal minimum oddweight error parity codes
    LatticeECP3 
    Data CODEC, Data Communication, Guidance Systems, Space 
    ECC Module Reference Design
  • GRHSSL - High Speed Serial Link Controller IP Core

    IP Core

    GRHSSL - High Speed Serial Link Controller IP Core

    The GRHSSL IP is a highly configurable high-speed serial link controller, described in VHDL. It can implement a SpaceFibre controller, a WizardLink controller or both.
    CertusPro-NX, Certus-NX 
    AHB, AXI, DMA, Space 
    GRHSSL - High Speed Serial Link Controller IP Core
  • GRPCI IP Core

    IP Core

    GRPCI IP Core

    The GRPCI IP core provides a 32-bit master/target interface for AMBA AHB 2.0 systems. It includes parameterizable FIFOs for both master and target operation and can optionally be provided with an independent DMA engine.
    CertusPro-NX, Certus-NX 
    AHB, AMBA, DMA, PCI, Space 
    GRPCI IP Core
  • GRSPW_CODEC SpaceWire Codec IP Core

    IP Core

    GRSPW_CODEC SpaceWire Codec IP Core

    The GRSPW_CODEC core implements a SpaceWire encoder decoder with a 9-bit wide FIFO host interface in each direction. The core complies to the SpaceWire standard (ECSS-E-ST-12C). Data is transmitted and received through FIFOs with configurable depth.
    CertusPro-NX, CrossLink-NX 
    Data CODEC, AHB, AMBA, Space 
    GRSPW_CODEC SpaceWire Codec IP Core
  • GRSPW2 SpaceWire Link IP Core

    IP Core

    GRSPW2 SpaceWire Link IP Core

    The GRSPW2 implements a SpaceWire link controller with RMAP support and AMBA host interface. The core complies to the SpaceWire standard (ECSS-E-ST-50-12C) with the protocol identification extension (ECSS-E-ST-50-51C) and RMAP protocol (ECSS-E-ST-50-52C).
    CertusPro-NX, CrossLink-NX 
    SPI Flash, AHB, AMBA, APB, Space 
    GRSPW2 SpaceWire Link IP Core
  • NOEL-V RISC-V Processor IP Core

    IP Core

    NOEL-V RISC-V Processor IP Core

    The NOEL-V is a VHDL model of a processor that implements the RISC-V architecture, which can be configured to conform to the RV32 or RV64 architectures.
    CertusPro-NX, Certus-NX 
    RISC-V, Soft Processor, Space 
    NOEL-V RISC-V Processor IP Core
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