Lattice Solutions

IP Core

RISC-V MC CPU IP Core

The Lattice RISC-V MC CPU soft IP contains a 32-bit RISC-V processor core and optional submodules – Timer and Programmable Interrupt Controller (PIC).

MachXO3D, Certus-NX, CrossLink-NX, Avant-E, MachXO5-NX, CertusPro-NX, MachXO3, MachXO2 

AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive 

IP Core

RISC-V RX CPU IP Core

Lattice RISC-V RX IP processes data and instructions while monitoring the external interrupts, using 32-bit RISC-V processor core and several submodules.

Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX 

AHB-Lite, Soft Processor, RISC-V, RTOS, Lattice Propel, Defense, Automotive 

IP Core

RISC-V SM CPU IP Core

Lattice RISC-V SM CPU IP core supports the RV32I instruction set, external interrupt, and debug feature, which is JTAG – IEEE 1149.1 compliant.

Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, MachXO3D, MachXO3, MachXO2 

AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive 

IP Core

Tightly-Coupled Memory (TCM) IP Core

The Tightly-Coupled Memory IP ensures low-latency automatic selection of the best memory type for user-selected application.

Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX 

Embedded Ram, FIFO, Lattice Propel, Lattice Diamond, Lattice Radiant 

Board

MachXO5T-NX Development Board

The MachXO5T-NX Development Board offers a variety of features and programmability that enhances Secure Control PLD functionality with Multiple Boot.

MachXO5-NX 

ADC/DAC, Hirose FX12, I2C, RJ-45, SPI, PMOD, LED Control, LVDS Video 

Board

MachXO5™-NX Development Board

Allows designers to work with features of MachXO5-25 and L-ASC10 hardware management expander to assist in rapid prototyping and testing of specific designs

MachXO5-NX 

ADC/DAC, Hirose FX12, I2C, RJ-45, SPI, PMOD, LED Control, LVDS Video 

Reference Design

MPESTI Initiator Reference Design

MPESTI Initiator Reference Design provides the solution template which is compliant with the MPESTI Base Specification.

Avant-E, MachXO5-NX, MachXO3, MachXO3D 

MPESTI, UART, APB, AHB 

IP Core

PCI Express x1 & x4 IP Core for Nexus-based FPGAs

The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 

APB, AHB, AHB-Lite, RTL, PCI, PCIe, Bus Controllers, Defense, Automotive 

IP Core

DC-SCM LVDS Tunneling Protocol and Interface IP Core

LTPI IP Core is an Open Computer Project Data Center – Secure Control Module Standards compatible solution which is introduced in the DC-SCM 2.0 Specification.

MachXO3, MachXO3D, MachXO5-NX 

CRC, LVDS, LTPI, AMBA, APB, Lattice Diamond, Lattice Radiant 

IP Core

FreeRTOS

FreeRTOS software included in Lattice Propel 2022.1 for RISC-V embedded processor available with real-time kernel and set of libraries.

Avant-E, MachXO5-NX, CertusPro-NX, Certus-NX, CrossLink-NX 

Lattice Propel, RTOS, RISC-V 

Reference Design

LVDS Tunneling Protocol and Interface Reference Design

The DC-SCM 2.0 LTPI Reference Design provides multiple solution compliant with DC-SCM 2.0 with a standardized DC-SCI and aggregating multiple data channels.

MachXO5-NX, MachXO3D, MachXO3, Mach-NX 

CRC, LVDS, I2C, GPIO, UART, LTPI, AMBA, APB, Lattice Diamond, Lattice Propel 

IP Core

Byte to Pixel Converter IP Core

Lattice Semiconductor Byte-to-Pixel Converter IP converts CSI-2/DSI standard based video payload packets from D-PHY Receiver Module output to pixel format

CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX 

MIPI, Modular MIPI/D-PHY, Parallel Video, Video Tx/Rx, Lattice mVision, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space 

IP Core

CSI-2/DSI D-PHY Receiver IP Core

Modular MIPI/D-PHY IP - PHY for receiving MIPI CSI-2/DSI Data for further processing. Supports up to 4 MIPI lanes to 10Gb/s

CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E 

CSI-2, DSI, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Automotive 

IP Core

CSI-2/DSI D-PHY Transmitter IP Core

The CSI-2/DSI D-PHY Transmitter Submodule IP is for applications requiring D-PHY transmitter in the FPGA logic & supports both high-speed & low power modes

CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX 

CSI-2, DSI, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space 

IP Core

FPD-LINK Receiver

Modular MIPI/D-PHY IP - Converts FPD-LINK Video Streams to Pixel Clock Domain

CrossLink, CrossLink-NX, Certus-NX, MachXO5-NX, Avant-E 

LVDS Video, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, Automotive 

IP Core

FPD-LINK Transmitter IP Core

The FPD-LINK Transmitter Interface IP translates DSI video streams to LVDS interface for an FDP-Link connection to displays.

CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, Avant-E, MachXO5-NX 

LVDS Video, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, Automotive 

IP Core

Internal Flash Controller IP Core

Internal Flash Controller enables you to access the internal Flash Memory using the AHB-Lite or APB interface.

MachXO5-NX 

AHB, AHB-Lite, Security, Automotive, Flash 

IP Core

Pixel to Byte Converter IP Core

Converts one, two, four, six, eight, or ten pixels per pixel clock into MIPI D-PHY byte packet compatible format

CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX 

CSI-2, MIPI, Modular MIPI/D-PHY, Parallel Video, Video Tx/Rx, Lattice mVision, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive 

IP Core

SubLVDS Image Sensor Receiver IP Core

The subLVDS interface is primarily used in image sensors, integrating one clock pair and one or more data pairs.

CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX 

LVDS Video, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, Automotive 

IP Core

I3C Controller IP Core

I3C Controller IP Core is a two-wire, bi-directional serial bus designed for use with many sensor secondary devices controlled by a single I3C controller.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, iCE40 UltraPlus 

I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive