• 莱迪思解决方案

莱迪思解决方案

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  • Unified Interconnect IP Core

    IP Core

    Unified Interconnect IP Core

    A high-performance and low-latency interconnect fabric for AXI4- and AXI4-Lite-based systems.
    Certus-N2, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X 
    AXI4 
    Unified Interconnect IP Core
  • 10G Ethernet IP Core

    IP Core

    10G Ethernet IP Core

    The Lattice 10G Ethernet IP Core supports the ability to transmit and receive data between a host processor and an Ethernet network.
    Avant-G, Avant-X, CertusPro-NX 
    Ethernet, PCS, XGMII, AXI4, Ethernet Bundle, SDR, Avionics 
    10G Ethernet IP Core
  • GHRD/GSRD参考设计

    Reference Design

    GHRD/GSRD参考设计

    黄金硬件和软件参考设计（GSRD）包括了使用基于CertusPro-NX Versa开发板开发各种应用所需的组件。
    CertusPro-NX, Avant-E 
    GHRD, GSRD, RISC-V, AXI4, MPMC, Lattice Automate, Defense 
  • GHRD/GSRD Demonstration

    演示

    GHRD/GSRD Demonstration

    The Golden Hardware and Software Reference Design comprises of components for developing various kind of applications using CertusPro-NX Versa Board.
    CertusPro-NX, Avant-E 
    GHRD, GSRD, RISC-V, AXI4, MPMC, Lattice Automate, Defense 
    GHRD/GSRD Demonstration
  • Octal SPI Controller IP Core

    IP Core

    Octal SPI Controller IP Core

    ​​Octal SPI Controller IP Core supports various types of SPI protocols & provides a flexible Transaction Layer Interface to the PCI Express Bus.​
    Avant-E, Avant-G, Avant-X, Certus-NX, CertusPro-NX, CrossLink-NX, MachXO5-NX 
    AMBA, AXI4, SPI 
    Octal SPI Controller IP Core
  • AXI4 to APB Bridge Module

    IP Core

    AXI4 to APB Bridge Module

    The Lattice Semiconductor AXI4 to APB Bridge Module provides an interface between the high-speed AXI4 and APB.
    Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 
    APB, AXI4, Lattice Avant, Lattice Propel 
    AXI4 to APB Bridge Module
  • AXI4 to AHB-Lite Bridge Module IP Core

    IP Core

    AXI4 to AHB-Lite Bridge Module IP Core

    Lattice Semiconductor AXI4 to AHB-Lite Bridge Module provides an interface between the high-speed AXI4 and AHB-Lite.
    Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 
    AHB-L, AHB-Lite, AXI4, Lattice Avant, Lattice Propel 
    AXI4 to AHB-Lite Bridge Module IP Core
  • AHB-Lite to AXI4 Bridge Module IP Core

    IP Core

    AHB-Lite to AXI4 Bridge Module IP Core

    The Lattice AHB-Lite to AXI4 Bridge IP Core is used for interfacing one AHB-Lite Manager and one AXI4 Subordinate.
    Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 
    AHB-L, AHB-Lite, AXI4, Lattice Avant 
    AHB-Lite to AXI4 Bridge Module IP Core
  • AXI4 Interconnect IP Core

    IP Core

    AXI4 Interconnect IP Core

    AXI4 Interconnect is a flexible, versatile, and easy-to-use IP with high-performance and low-latency interconnect fabric for AMBA 4 AXI/AXI-lite based systems.
    Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 
    AMBA, AXI4, AXI, AXI-Lite Interface, Lattice Avant 
    AXI4 Interconnect IP Core
  • AXI4 Multi Port Bridge for Memory Controller IP Core

    IP Core

    AXI4 Multi Port Bridge for Memory Controller IP Core

    The AXI4 Multi Port Bridge for Memory Controller (MPMC) IP connects multiple external managers to a single memory controller.
    Avant-E, Avant-G, Avant-X, CertusPro-NX 
    AXI4, Memory Controller, AXI 
    AXI4 Multi Port Bridge for Memory Controller IP Core
  • RISC-V RX and LPDDR4 Memory Controller Reference Design

    Reference Design

    RISC-V RX and LPDDR4 Memory Controller Reference Design

    RISC-V RX & LPDDR4 Memory Controller Reference Design shows usage of the RISC-V RX soft IP & LPDDR4 memory controller in Lattice Avant™ & CertusPro™ NX.
    Avant-E, CertusPro-NX 
    RISC-V, LPDDR4, AXI4, SDRAM, IEEE 1149.1, Lattice Propel 
    RISC-V RX and LPDDR4 Memory Controller Reference Design
  • I/O Interface IP Core

    IP Core

    I/O Interface IP Core

    Lattice Semiconductor’s IO Interface attribute acts as a memory interface to access valid addresses for GPO register writes and GPI register reads.
    Certus-N2, Avant-E, Avant-G, Avant-X, Certus-NX, CertusPro-NX, MachXO5-NX, MachXO4, CrossLink-NX 
    AHB-Lite, AXI4, I/O Interface, Lattice Propel 
  • Joint Test Action Group (JTAG) Bridge IP Core

    IP Core

    Joint Test Action Group (JTAG) Bridge IP Core

    The Lattice Semiconductor JTAG Bridge IP provides an efficient solution for debugging on-board issues by allowing you to access memory and peripheral registers directly using this IP, without involving the processor.
    Certus-N2, Avant-E, Avant-G, Avant-X, MachXO5-NX, CertusPro-NX, Certus-NX, CrossLink-NX 
    JTAG, AXI4, UART, Lattice Propel 
  • Mailbox IP Core

    IP Core

    Mailbox IP Core

    Lattice Semiconductor’s Mailbox IP functions as a memory interface, allowing access to valid addresses for GPO register writes and GPI register reads.
    Certus-N2, Avant-E, Avant-G, Avant-X, MachXO5-NX, CertusPro-NX, Certus-NX, CrossLink-NX 
    AHB-Lite, AXI4, Lattice Propel 
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