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  • Image Signal Processing IP Cores Suite

    IP Core

    Image Signal Processing IP Cores Suite

    The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.
    CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E 
    AXI, AXI-Stream, AXI-Lite Interface, AWB, Camera, CCM, CFA Interpolation, Debayer, Image Processing, Image Signal Processing, Lattice mVision, RGB, Defense 
    Image Signal Processing IP Cores Suite
  • AXI4 Interconnect Module

    IP Core

    AXI4 Interconnect Module

    AXI4 Interconnect is a flexible, versatile, and easy-to-use IP with high-performance and low-latency interconnect fabric for AMBA 4 AXI/AXI-lite based systems.
    Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX 
    AMBA, AXI4, AXI, AXI-Lite Interface, Lattice Avant 
    AXI4 Interconnect Module
  • Video Scaler IP Core

    IP Core

    Video Scaler IP Core

    The Lattice Video Scaler IP Core is used to scale up or scale down the resolution of a video stream.
    CertusPro-NX, Certus-NX, CrossLink-NX 
    Lattice Drive, AXI, AXI-Lite Interface, Video Scaling, Embedded Ram, DSP, DSP Bundle 
    Video Scaler IP Core
  • AXI Register Slice IP Core

    IP Core

    AXI Register Slice IP Core

    The AXI Register Slice connects the AXI subordinate to the AXI manager by introducing pipeline stages in between to close the timing in critical paths.
    Avant-E, CertusPro-NX, Avant-G, Avant-X 
    AXI, AXI-Lite Interface, Lattice Propel, Lattice Radiant 
    AXI Register Slice IP Core
  • MDIO Leader IP Core

    IP Core

    MDIO Leader IP Core

    MDIO LEADER IP features three different standard interfaces for accessing the control and status signals of Leader: APB, AHB-L and AXI-L.
    Avant-E, CertusPro-NX 
    Bus Controllers, Ethernet, IEEE 802.3, APB, AHB-L, AXI-Lite Interface 
    MDIO Leader IP Core
  • Tri-Speed Ethernet MAC IP Core

    IP Core

    Tri-Speed Ethernet MAC IP Core

    The TSEMAC IP core have the logic, interfacing & clocking infra to ably integrate an external industry-standard Ethernet PHY with an internal processor
    ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, LatticeSC/M, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X 
    Data Communication, Ethernet, Defense, Automotive, APB, AXI, AXI-Lite Interface, AHB, Ethernet Bundle 
    Tri-Speed Ethernet MAC IP Core
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