Lattice Solutions

IP Core

FFT Compiler IP Core

The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, Certus-NX, CertusPro-NX, MachXO5-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X 

Data Communication, DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

FIR Filter Generator IP Core

This IP core is a widely configurable, multi-channel FIR filter, implemented using high performance sysDSP™ blocks available in Lattice devices.

ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X 

DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

Timer/Counter IP Core

The Lattice Semiconductor Timer/Counter IP is used to track timeouts in the system, and it generates an interrupt to the CPU when a timeout is detected.

Certus-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, CertusPro-NX, CrossLink, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 LP/HX, iCE40 Ultra / UltraLite, iCE40 UltraPlus, LatticeECP2/M, LatticeECP3, LatticeSC/M, LatticeXP2, Mach-NX, MachXO, MachXO2, MachXO3, MachXO3D, MachXO5-NX 

AMBA, Lattice Propel, Lattice Diamond, Lattice Radiant, APB, AHB-Lite, Lattice Sentry, Lattice Sentry PFR IP Package, Security 

IP Core

Helion IONOS Image Signal Processing IP Portfolio

Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.

MachXO, LatticeXP2, LatticeECP3, CrossLink, ECP5 / ECP5-5G, CrossLink-NX 

HDR, Image Processing, Video Tx/Rx, Lattice mVision, Automotive 

IP Core

Tri-Speed Ethernet MAC IP Core

The TSEMAC IP core have the logic, interfacing & clocking infra to ably integrate an external industry-standard Ethernet PHY with an internal processor

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, LatticeSC/M, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X 

Data Communication, Ethernet, Defense, Automotive, APB, AXI, AXI-Lite Interface, AHB, Ethernet Bundle 

Reference Design

I2C Bus Master

Demonstrates how a fast and configurable I2C-Bus Master Controller can be constructed and utilized in a Lattice CPLD/FPGA device

MachXO, LatticeXP2, ispMACH 4000ZE, MachXO2, LatticeECP3, Platform Manager, ECP5 / ECP5-5G, MachXO3 

Bus Controllers, I2C, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, 5G 

Reference Design

I2C Master - WISHBONE Compatible

Based on the OpenCores I2C master core, this Reference Design provides a bridge between the I2C and WISHBONE bus

MachXO, MachXO2, LatticeXP2, LatticeECP3, ECP5 / ECP5-5G, MachXO3 

I2C, Wishbone, Bus Controllers, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, 5G 

IP Core

Color Space Converter (CSC) IP Core

The Lattice Color Space Converter IP Core is widely parameterizable and can support any custom color space conversion requirement.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeSC/M, LatticeXP2, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX, Avant-G, Avant-X 

Image Processing, JPEG CODEC, Lattice mVision, UAVs, Automotive 

IP Core

LatticeMico32 Open, Free 32-Bit Soft Processor

A 32-bit Harvard, RISC architecture soft microprocessor, available for free with an open IP core license. Many compatible modules and IP are available.

LatticeECP3, LatticeXP2, LatticeECP2/M 

GPIO Control, Mico, Soft Processor, UART, Wishbone, TOR Switch, Defense 

IP Core

Coordinate Rotational Digital Computer (CORDIC) IP Core

The Lattice CORDIC IP uses full internal precision while allowing variable output precision with several choices for rounding.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeSC/M, LatticeXP2, Certus-NX, CertusPro-NX, MachXO5-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X 

DSP, Automotive, DSP Bundle 

IP Core

Scatter-Gather DMA Controller IP Core

Implements a configurable, multi-channel, WISHBONE-compliant DMA controller with scatter-gather capability

Avant-E, Avant-G, Avant-X, CrossLink-NX, ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeSC/M, LatticeXP2 

Bus Controllers, DMA, Defense, PCIe Bundle 

IP Core

Video Frame Buffer IP Core

The Video Frame Buffer IP core buffers video data in external memory to be displayed on output devices such as computer monitors, projectors, etc

Avant-E, ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, Avant-G, Avant-X, Certus-NX, CertusPro-NX, CrossLink-NX 

Image Processing, Parallel Video, Video Tx/Rx, Lattice mVision, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, DSP Bundle 

Board

HWD-XP2-USB by JK Hardware Design

General purpose evaluation and development platform for LatticeXP2

LatticeXP2 

SRAM, Breakout 

Reference Design

Simple Sigma-Delta ADC

Implements an Analog-to-Digital (ADC) using on-FPGA differntial LVDS inputs (or inexpensive analog comparitor). Save cost by eliminating external ADC devices.

MachXO, MachXO2, LatticeXP2, iCE40 UltraPlus 

ADC/DAC, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems 

Reference Design

UART Reference Design

The UART reference design describes a fully configurable UART optimized for and implemented in a variety of Lattice devices.

ispMACH 4000ZE, MachXO, LatticeXP2, Platform Manager, MachXO5-NX, MachXO2 

Bus Controllers, UART 

Reference Design

UART Reference Design - WISHBONE Compatible

UART (Universal Asynchronous Receiver/Transmitter) provides both Rx and Tx between the WISHBONE system bus and an RS232 serial communication channel.

MachXO, LatticeXP2, MachXO2, MachXO3 

Bus Controllers, UART, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, 5G 

IP Core

Gamma Corrector IP Core

The Lattice Gamma Corrector IP core is a multi-color plane gamma correction system that can support almost any custom gamma correction requirement.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, CertusPro-NX, Avant-E, Avant-G, Avant-X, CrossLink-NX, Certus-NX, MachXO5-NX 

Image Processing, Lattice mVision, UAVs, DSP Bundle 

Reference Design

SDR SDRAM Controller-Advanced Reference Design

Provides a simple generic system interface to the bus master, reducing the user's effort to deal with the SDRAM command interface.

MachXO, ispMACH 4000ZE, LatticeXP2, MachXO2, LatticeECP3, ECP5 / ECP5-5G, MachXO3 

DDR SDRAM 

IP Core

2D Scaler IP Core

Highly-configurable design to convert input video frames of one size to output video frames of a different size

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, Certus-NX, CertusPro-NX, MachXO5-NX 

Image Processing, Video Bridge, DSP, Lattice mVision, Defense, UAVs, Automotive, DSP Bundle 

Reference Design

BSCAN - Multiple Port Linker (BSCAN2)

Implements an IEEE 1149.1 compliant Boundary Scan port on an FPGA. Multiple scan ports are linked together feeing into the IEEE 1149.1 port.

MachXO, MachXO2, ispMACH 4000ZE, ispMACH 4000V/B/C/Z, LatticeXP2, ECP5 / ECP5-5G 

IEEE 1149.1, Boundary Scan