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  • Avant-E Evaluation Board

    Board

    Avant-E Evaluation Board

    The Avant-E Evaluation Board has the ability to expand the usability of the Avant-E FPGA with FMC HPC, PMOD, and Raspberry PI connectors.
    Avant-E Evaluation Board
  • CertusPro-NX Evaluation Board

    Board

    CertusPro-NX Evaluation Board

    CertusPro-NX Evaluation Board, a FPGA-based rapid prototyping and testing of specific designs with the features of CertusPro-NX FPGA family.
    CertusPro-NX Evaluation Board
  • JESD204B IP Core

    IP Core

    JESD204B IP Core

    Supports ADC/DAC to FPGA in both an Rx and/or a Tx core. The Rx and Tx cores can each be generated separately and with different parameters.
    JESD204B IP Core
  • Digital Front End (DFE) Demo

    Demo

    Digital Front End (DFE) Demo

    Lattice DFE (Digital Front End) demonstration utilizing of CPRI (Common Public Radio Interface), DUC (Digital Up Converter) and CFR (Crest Factor Reduction).
    Digital Front End (DFE) Demo
  • Crest Factor Reduction IP

    IP Core

    Crest Factor Reduction IP

    Reduces the peak-to-average ratio (PAR) of wideband digital signals. Highly configurable - up to 4 antennas with a wide variety of singal processing options.
    Crest Factor Reduction IP
  • JESD204A IP Core

    IP Core

    JESD204A IP Core

    Supports ADC/DAC to FPGA in both an Rx and/or a Tx core. The Rx and Tx cores can each be generated separately and with different parameters.
    JESD204A IP Core
  • JESD204 ADC Reference Design

    Reference Design

    JESD204 ADC Reference Design

    Provides designers an ideal platform for a low cost, low power and small footprint solution for FPGA based serial data acquisition and processing
    JESD204 ADC Reference Design
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