PCI Express x1, x4 Root Complex Lite IP Core

PCI Express is a high performance, fully scalable, well defined standard for a wide variety of computing and communications platforms. It has been defined to provide software compatibility with existing PCI drivers and operating systems. Being a packet based serial technology, PCI Express greatly reduces the number of required pins and simplifies board routing and manufacturing. PCI Express is a point-to-point technology, as opposed to the multidrop bus in PCI. Each PCI Express device has the advantage of full duplex communication with its neighbor to greatly increase overall system bandwidth. The basic data rate for a single lane is double that of the 32 bit/33 MHz PCI bus. A four lane link has eight times the data rate in each direction of a conventional bus.

Lattice’s PCI Express Root Complex (RC) Lite core provides an x1 or x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCI express protocol stack. This IP is a lighter version of the root complex intended to use in simple bridging application to local bus. This solution supports the high value, low power LatticeECP5, LatticeECP3 and LatticeECP2M FPGA device families.

Features

  • PCI Express 1.1 electrical compliance
  • 8b/10b symbol encoding/decoding
  • 125 MHz user interface
    • Native x4 and Downgraded x2 support a 64-bit data path
    • x1 supports a 16-bit data path
  • Malformed and poisoned TLP detection
  • Higher layer control of LTSSM via ports

Jump to

Block Diagram

PCI Express Root Complex Lite

Performance and Size

PCI Express x1 and x4 Root Complex

  X1 Native X4 Native
FPGA Families Supported ECP5 LatticeECP3 LatticeECP2M ECP5 LatticeECP3 LatticeECP2M
IPexpress Configuration Config 1 Config 1 Config 1 Config 1 Config 1 Config 1
Slices 3207 3092 3260 8021 7552 8185
LUTs 4649 4521 4770 11907 10537 10889
Registers 3186 3177 3096 8199 8460 8469
sysMEM EBRs 3 3 3 9 9 9

Ordering Information

Device Family Partner Number
Single Design Multi-Site Subscription
ECP5 PCI-ERC1-E5-U PCI-ERC1-E5-UT PCI-ERC1-E5-US
PCI-ERC4-E5-U PCI-ERC4-E5-UT PCI-ERC4-E5-US
LatticeECP3 PCI-ERC1-E3-U3 PCI-ERC1-E3-UT1 PCI-ERC1-E3-US
PCI-ERC4-E3-U3 PCI-ERC4-E3-UT1 PCI-ERC4-E3-US
LatticeECP2M PCI-ERC1-PM-U1 PCI-ERC1-PM-UT1 N/A
PCI-ERC4-PM-U1 PCI-ERC4-PM-UT1 N/A

To download a full evaluation version of this IP, go to the IP Server in Lattice Radiant. This IP core supports Lattice’s IP hardware evaluation capability, which makes it possible to generate the IP core and operate in hardware for a limited time (approximately four hours) without requiring an IP license.

To find out how to purchase the PCI Express Endpoint IP core, please contact your local Lattice Sales Office.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
PCIE X4 IP Core - Lattice Radiant Sofware
FPGA-IPUG-02126 1.0 6/23/2021 PDF 3.6 MB
PCI Express x1 x2 x4 Root Complex Lite IP Core User Guide
IPUG119 1.1 10/31/2016 PDF 5.8 MB
PCI Express x1/x2/x4 Endpoint IP Core User Guide - Lattice Diamond Software
FPGA-IPUG-02009 2.0 10/2/2020 PDF 3.6 MB
PCI Express 1.1 Root Complex Lite x1, x4 IP Core User Guide
IPUG85 1.1 2/23/2012 PDF 4.3 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
IPexpress Quick Start Guide
8/5/2010 PDF 304.8 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.