MachXO4

​​Next Generation of Low-Power & Non-Volatile Control FPGAs​

Related Products

The MachXO4™ family extends Lattice Semiconductor’s ultra-low-density FPGA portfolio with advanced features designed for flexibility and efficiency. These devices combine low power consumption, embedded flash, high I/O density, and instant-on capability to meet the demands of modern systems.

Offering exceptional I/O density in compact packages, MachXO4™ integrates hardened functions that help reduce overall system cost and footprint. With broad programmability and native support for industry-standard interfaces, this device family provides a scalable platform for evolving connectivity and control applications.

Built on a 65 nm non-volatile low-power process, MachXO4™ comes in two variants: high performance with 2.5V/3.3V supply (HC) and high performance with 1.2V supply (HE). Both are functionally and pin-compatible.

Features

  • Efficient Design with the Latest Generation of Tools and Silicon
    Wide range of logic density from 896 to 9400 LUTs, fabric performance of up to 150 MHz, and enhanced support in Lattice Radiant software for improved design productivity
  • Highly Flexible and Robust I/O
    Supports 3.3V - 1.0V I/O standards, hot socketing with low leakage current of 350 uA, mixed voltage support for LVCMOS and LVTTL, and default pulldown resistors to minimize external components
  • Best-in-Class Power Efficiency in Smallest Form Factor
    Low power consumption as low as 1 mW of static power and compact packages as small as 2.5 mm x 2.5 mm

Technical Features & Advantages

  • Embedded flash memory with User Flash Memory (UFM) up to 448 kb
  • Instant-on power-up with fast boot time of less than 5 ms
  • Hot socketing with leakage current as low as 350 uA and no power supply sequencing
  • Compact packages with high I/O-to-LUT ratio up to 382 I/O pins
  • On-chip hardened functions: SPI, I2C, timer/counter, and oscillator
  • Available in Commercial, Industrial, and Automotive grades

Jump to

Family Table

MachXO4 Device Selection Guide
Features LFMXO4-010 LFMXO4-015 LFMXO4-025 LFMXO4-050 LFMXO4-080 LFMXO4-110
Look-up Table (LUT) 896 1,280 2,112 4,320 6,864 9,400
Logic Cells 1,100 1,600 2,600 5,200 8,300 11,300
Embedded RAM (M9k Blocks / kb) 7 / 64 7 / 64 8 / 74 10 / 92 26 / 240 48 / 432
Distributed RAM (kb) 10 10 16 34 54 73
User Flash Memory (kb) 64 64 80 96 256 448
Dual Boot External External External External External External
Phased Lock Loop (PLL) 1 1 1 2 2 2
I2C 2 2 2 2 2 2
SPI 1 1 1 1 1 1
Timer/Counter 1 1 1 1 1 1
On-chip Oscillator 1 1 1 1 1 1
VCC = 2.5 V / 3.3 V Yes Yes Yes Yes Yes Yes
VCC = 1.2 V Yes Yes Yes Yes Yes Yes
Temperature Grade C / I / A C / I / A C / I / A C / I / A C / I C / I
0.4 mm Pitch Packages Total I/O Count
  LFMXO4-010 LFMXO4-015 LFMXO4-025 LFMXO4-050 LFMXO4-080 LFMXO4-110
UUG3611 (36-ball WLCSP, 2.5 x 2.5 mm)
27



UUG4911 (49-ball WLCSP, 3.2 x 3.2 mm)

37


UUG8111 (81-ball WLCSP, 3.8 x 3.8 mm)


62

0.5 mm Pitch Packages Total I/O Count
  LFMXO4-010 LFMXO4-015 LFMXO4-025 LFMXO4-050 LFMXO4-080 LFMXO4-110
TSG100 (100-pin TQFP, 14 x 14 mm) 78 2 78 2 78 2


BSG132 (132-ball csBGA, 8 x 8 mm) 102 2 102 2 102 2 102 2

TSG144 (144-pin TQFP, 20 x 20 mm) 105 105 109 112

0.8 mm Pitch Packages Total I/O Count
  LFMXO4-010 LFMXO4-015 LFMXO4-025 LFMXO4-050 LFMXO4-080 LFMXO4-110
BBG256 (256-ball caBGA, 14 x 14 mm)
204 2 204 2 204 2 204 2 204 2
BBG400 (400-ball caBGA, 17 x 17 mm)


333 333 333
BBG484 (484-ball caBGA, 19 x 19 mm)




382
1.0 mm Pitch Packages Total I/O Count
  LFMXO4-010 LFMXO4-015 LFMXO4-025 LFMXO4-050 LFMXO4-080 LFMXO4-110
BFG256 (256-ball ftBGA, 17 x 17 mm)
204 204 204

1. Package is only available for VCC = 1.2 V devices.
2. Package is available for automotive devices.

Example Use Cases

MachXO4-ApplicationsExpand Image

System Board Management

  • High I/O count for sensor and actuator interfacing
  • Instant-on (<5 ms) for real-time control
  • Compact form factor for board-level integration
  • Integrated flash for configuration without external memory
  • Single voltage rail simplifies power design
MachXO4 Motor ControlExpand Image

Motor Control

  • Support for various motor types across industrial, automotive, and embedded systems
  • IGBT protection and SPI for real-time MCU feedback
  • Low-power, fast-response communication standard compatibility
  • Small footprint
MachXO4 Camera Display BridgingExpand Image

Camera & Display Bridging

  • Supports 1–4 CSI-2 lanes up to 900 Mbps (Rx/Tx)
  • DSI Tx with HS and LP modes (Tx/Rx)
  • Compatible with RAW, YUV, RGB, YCbCr, and user-defined formats
  • Compact package: Fits in 36-WLCSP (2.5 × 2.5 mm)
MachXO4 LED ControlExpand Image

LED Control

  • Programmable I/O and PLL for dimming, blinking, and color mixing
  • Low power operation for efficient lighting
  • Integrated Flash/UFM for storing LED profiles

Design Resources

Development Kits & Boards

Our development boards & kits help streamline your design process

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

開発ソフトウェア

使いやすく、開発に必要な機能を提供

Documentation

Quick Reference
Technical Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 8.9 12/11/2025 ZIP 3.1 MB
MachXO4 Family Data Sheet
FPGA-DS-02125 1.0 12/11/2025 PDF 2.4 MB
MachXO4 Programming and Configuration User Guide
FPGA-TN-02393 1.0 12/11/2025 PDF 1.4 MB
Temperature Excursion User Guide for MachXO3 and MachXO4 Devices
FPGA-TN-02263 1.2 12/11/2025 PDF 373 KB
Thermal Management
FPGA-TN-02044 5.8 12/11/2025 PDF 1.1 MB
MachXO4 Hardened Control Functions Reference Guide
FPGA-TN-02404 1.0 12/11/2025 PDF 1.6 MB
PCB Layout Recommendations for Leaded Packages
FPGA-TN-02160 1.5 7/30/2021 PDF 561.6 KB
MachXO4 sysCLOCK PLL Design User Guide
FPGA-TN-02391 1.0 12/11/2025 PDF 1.1 MB
MachXO4 Hardened Control Functions User Guide
FPGA-TN-02403 1.0 12/11/2025 PDF 1.3 MB
Using TraceID
FPGA-TN-02084 2.9 12/11/2025 PDF 491.6 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.6 12/11/2025 PDF 1.6 MB
MachXO4 Soft Error Detection (SED) and Correction (SEC) User Guide
FPGA-TN-02406 1.0 12/11/2025 PDF 561.7 KB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.4 12/11/2025 PDF 957.3 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 5.2 12/11/2025 PDF 533.3 KB
MachXO4 Memory User Guide
FPGA-TN-02402 1.0 12/11/2025 PDF 1.6 MB
MachXO4 sysI/O User Guide
FPGA-TN-02398 1.0 12/11/2025 PDF 1.1 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.6 12/10/2024 PDF 6.2 MB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-02115 1.1 1/26/2022 PDF 708.9 KB
MachXO4 Implementing High-Speed I/O Interface
FPGA-TN-02410 1.0 12/11/2025 PDF 1.1 MB
Using Password Security with MachXO4 Devices
FPGA-TN-02408 1.0 12/11/2025 PDF 393.5 KB
MachXO4 Single Event Upset (SEU) Report
FPGA-TN-02407 1.0 12/11/2025 PDF 342.5 KB
MachXO4 Hardware Checklist
FPGA-TN-02411 1.00 12/11/2025 PDF 730.5 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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MachXO4 Family Data Sheet
FPGA-DS-02125 1.0 12/11/2025 PDF 2.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
MachXO4 Programming and Configuration User Guide
FPGA-TN-02393 1.0 12/11/2025 PDF 1.4 MB
Temperature Excursion User Guide for MachXO3 and MachXO4 Devices
FPGA-TN-02263 1.2 12/11/2025 PDF 373 KB
Thermal Management
FPGA-TN-02044 5.8 12/11/2025 PDF 1.1 MB
MachXO4 Hardened Control Functions Reference Guide
FPGA-TN-02404 1.0 12/11/2025 PDF 1.6 MB
PCB Layout Recommendations for Leaded Packages
FPGA-TN-02160 1.5 7/30/2021 PDF 561.6 KB
MachXO4 sysCLOCK PLL Design User Guide
FPGA-TN-02391 1.0 12/11/2025 PDF 1.1 MB
MachXO4 Hardened Control Functions User Guide
FPGA-TN-02403 1.0 12/11/2025 PDF 1.3 MB
Using TraceID
FPGA-TN-02084 2.9 12/11/2025 PDF 491.6 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.6 12/11/2025 PDF 1.6 MB
MachXO4 Soft Error Detection (SED) and Correction (SEC) User Guide
FPGA-TN-02406 1.0 12/11/2025 PDF 561.7 KB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.4 12/11/2025 PDF 957.3 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 5.2 12/11/2025 PDF 533.3 KB
MachXO4 Memory User Guide
FPGA-TN-02402 1.0 12/11/2025 PDF 1.6 MB
MachXO4 sysI/O User Guide
FPGA-TN-02398 1.0 12/11/2025 PDF 1.1 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.6 12/10/2024 PDF 6.2 MB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-02115 1.1 1/26/2022 PDF 708.9 KB
MachXO4 Implementing High-Speed I/O Interface
FPGA-TN-02410 1.0 12/11/2025 PDF 1.1 MB
Using Password Security with MachXO4 Devices
FPGA-TN-02408 1.0 12/11/2025 PDF 393.5 KB
MachXO4 Single Event Upset (SEU) Report
FPGA-TN-02407 1.0 12/11/2025 PDF 342.5 KB
MachXO4 Hardware Checklist
FPGA-TN-02411 1.00 12/11/2025 PDF 730.5 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
MachXO4 Package Diagram
FPGA-DS-02128 1.0 12/11/2025 ZIP 877.4 KB
LFMXO4-010 Pinout Table
FPGA-SC-02083 1.0 12/11/2025 CSV 5.8 KB
LFMXO4-080-Pinout-Table
FPGA-SC-02089 1.0 12/11/2025 CSV 15 KB
LFMXO4-015 256 BGA Pinout Table
FPGA-SC-02094 1.0 12/11/2025 CSV 9.7 KB
MachXO4 400-ball caBGA Package Migration Table
FPGA-SC-02099 1.0 12/11/2025 CSV 35 KB
MachXO4 484-ball caBGA Package Migration Table
FPGA-SC-02100 1.0 12/11/2025 CSV 27.7 KB
LFMXO4-015 Pinout Table
FPGA-SC-02093 1.0 12/11/2025 CSV 6.2 KB
LFMXO4-050 Pinout Table
FPGA-SC-02091 1.0 12/11/2025 CSV 13.4 KB
LFMXO4-050 400 BGA Pinout Table
FPGA-SC-02092 1.0 12/11/2025 CSV 13.8 KB
LFMXO4-110 Pinout Table
FPGA-SC-02090 1.0 12/11/2025 CSV 19.8 KB
MachXO4 132-ball csBGA Package Migration Table
FPGA-SC-02096 1.0 12/11/2025 CSV 15.7 KB
MachXO4 256-ball caBGA Package Migration Table
FPGA-SC-02098 1.0 12/11/2025 CSV 37.3 KB
MachXO4 100-pin TQFP Package Migration Table
FPGA-SC-02095 1.0 12/11/2025 CSV 8.9 KB
MachXO4 256-ball ftBGA Package Migration Table
FPGA-SC-02101 1.0 12/11/2025 CSV 22.2 KB
LFMXO4-025-Pinout-Table
FPGA-SC-02084 1.0 12/11/2025 CSV 13.3 KB
MachXO4 144-pin TQFP Package Migration Table
FPGA-SC-02097 1.0 12/11/2025 CSV 16.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 8.9 12/11/2025 ZIP 3.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[BSDL] LFMXO4-015
FPGA-MD-02104 1.0 12/11/2025 ZIP 107.8 KB
[BSDL] LFMXO4-010
FPGA-MD-02103 1.0 12/11/2025 ZIP 48.6 KB
[BSDL] LFMXO4-110
FPGA-MD-02108 1.0 12/11/2025 ZIP 65 KB
[BSDL] LFMXO4-025
FPGA-MD-02105 1.0 12/11/2025 ZIP 117 KB
[BSDL] LFMXO4-050
FPGA-MD-02106 1.0 12/11/2025 ZIP 129.1 KB
[BSDL] LFMXO4-080
FPGA-MD-02107 1.0 12/11/2025 ZIP 58.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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MachXO4 Family Delphi Models
FPGA-MD-02089 0.80 12/12/2025 ZIP 1.6 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[IBIS] MachXO4
FPGA-MD-02098 1.0 12/11/2025 ZIP 11.4 MB

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