Driver Assistance and ADAS

Reliable, Secure, Low Power ADAS Applications

A higher level of functionalities expected in next-generation cars like driver assistance requires a higher level of performance and multi-sensor fusion systems. Lattice FPGAs address these evolving needs for a flexible and scalable domain controllers design to meet cost and power needs.

  • Enabling parallel sensor data processing with customized low latency networking solution for real time decision making at domain controllers or redundant decision processor systems
  • Enabling low-power multi-sensor interfaces for sensor fusion applications and display interfaces
  • Enabling protection against cyber-attacks while ensuring safety using Lattice FPGA’s hardware-based security, low Soft Error Rates (SER), and Functional Safety (FuSa)
ADAS

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Block Diagram

ADAS and Driver Assistance

Example Use Cases

In-car camera design with image sensor processing

  • Application specific image sensor processing
  • Flexible connectivity to the rest of the car e.g., domain/zonal controllers
  • Flexible video & image resolution and interface support
  • Integration of additional features like compression and link encryption possible

Real-time data-capture adapter for radar sensing Eval module

  • Supports lab and mobile collection scenarios
  • Captures LVDS data from AWR/ IWR radar sensors
  • Streams output in real-time over low latency 1G Ethernet
  • Controlled via onboard switches or GUI/library

MIPI Splitter for Redundant Processing Systems

  • MIPI speeds supported up to 10 Gbps MIPI D-PHY
  • Support for a variety of sensor interfaces including MIPI, GMII, and PCIe
  • Data pre-processing to reduce SoC loads
  • Low power device for better thermals

Sensor fusion with CrossLink-NX and ECP5

  • Support for heterogeneous sensors with flexible interfaces
  • High-speed interface to SoC including MIPI D-PHY, PCIe, and GMII
  • Accurate and dependable data repackaging from different sensors
  • Single-chip sensor aggregation interfacing with more than dozens of sensors

Sensor aggregation with transmission up to 10m

  • Real-time image and data transfer using Auto SERDES chipsets
  • Sensor aggregation and fast data transfer without skew
  • Longer and cheaper wiring with low EMI
  • Heterogeneous sensor interfaces with FPGAs

Hardware-based SecureBoot and Supply Chain Security

  • NIST compliant Platform Firmware Resiliency (PFR) for ADAS/ DA Domain Controllers
  • Real-time Protect, Detect and Recover for non-bypassable security to cover vulnerable attack points
  • Scalable solution with nanosecond level response for all firmware on the board

Chain of Trust Implementation for Automotive ECUs

  • Hardware Root-of-Trust is the first link in chain of trust that protects entire car system and ECUs
  • Hardened device configuration engine cryptographically authenticates MachXO3D’s configuration image at power-on
  • Embedded security block provides cryptographic functions to authenticate other platform firmware at for the Automotive ECU power-on
  • With instant-on capability MachXO3D is the first device to boot up securely on the platform and as such is an excellent anchor for Chain of Trust

Reference Designs

MIPI CSI-2 to HDMI Reference Design

Reference Design

MIPI CSI-2 to HDMI Reference Design

MIPI CSI-2 to HDMI Reference Design includes the synthesizable MIPI-HDMI core design & stimulus generators, checkers, & a testbench necessary to simulate the design
MIPI CSI-2 to HDMI Reference Design
Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design

Reference Design

Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design

Reference Design that shows transfer of sensor data to the computer memory and rendering of the data as video on the computer screen using the software driver.
Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design
SLVS-EC Sensor to PCIe Bridge Reference Design

Reference Design

SLVS-EC Sensor to PCIe Bridge Reference Design

SLVS-EC to PCIe reference design allows the quick interface to receive serial data from CMOS Image Sensors & convert to DMA/PCIe Subsystem data format.
SLVS-EC Sensor to PCIe Bridge Reference Design
Lattice Image Signal Processing Reference Design

Reference Design

Lattice Image Signal Processing Reference Design

Configure an ECP5 FPGA-based ISP solution tailored to your Industrial, Medical, and Automotive application.
Lattice Image Signal Processing Reference Design
MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge for CertusPro-NX

Reference Design

MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge for CertusPro-NX

Modular MIPI/D-PHY Reference Design - MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge reference design takes DSI or CSI-2 MIPI data and converts them to OpenLDI format on LVDS.
MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge for CertusPro-NX

Demos

Lattice Image Signal Processing Demo

Demo

Lattice Image Signal Processing Demo

Provides a complete ISP example design on the Lattice ECP5 FPGA for the Embedded Vision Development Kit, ideal for Industrial, Medical, and Automotive applications.
Lattice Image Signal Processing Demo
MIPI CSI-2 to HDMI Demonstration

Demo

MIPI CSI-2 to HDMI Demonstration

Lattice MIPI-HDMI Demonstration is built using multiple Lattice IPs and some additional glue logic necessary to connect the IPs in a processing pipeline.
MIPI CSI-2 to HDMI Demonstration
Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration

Demo

Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration

This design demonstrates the functionality of transferring MIPI CSI-2 sensor video data to a computer through PCIe with a Direct Memory Access (DMA) engine.
Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration
SLVS-EC Sensor to PCIe Bridge Demonstration

Demo

SLVS-EC Sensor to PCIe Bridge Demonstration

The SLVS-EC RX IP provides the FPGA an interface to receive serial data from CMOS Image Sensors and offers a solution to convert the incoming serial data to a parallel pixel data format.
SLVS-EC Sensor to PCIe Bridge Demonstration
CSI-2 PCIe Bridge Demonstration

Demo

CSI-2 PCIe Bridge Demonstration

This design demonstrates the functionality of transferring MIPI CSI-2 camera video data to computer via PCIe with a Direct Memory Access (DMA) engine.
CSI-2 PCIe Bridge Demonstration

IP Cores

Image Signal Processing IP Cores Suite

IP Core

Image Signal Processing IP Cores Suite

The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.
Image Signal Processing IP Cores Suite
Helion IONOS画像シグナル処理IPポートフォリオ

IP Core

Helion IONOS画像シグナル処理IPポートフォリオ

Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.
Helion IONOS画像シグナル処理IPポートフォリオ
CSI-2 / DSI D-PHY レシーバ

IP Core

CSI-2 / DSI D-PHY レシーバ

MIPI D-PHY はカメラやディスプレイの標準的なインタフェースです。この IP を使用すると FPGA に D-PHY レシーバを実装できます。
CSI-2 / DSI D-PHY レシーバ
FPD-Link トランスミッタ

IP Core

FPD-Link トランスミッタ

OpenLDI / FPD-Link / LVDS トランスミッタ・インタフェース IP は ピクセルデータフォーマットのビデオデータを FPD-Link やその他の LVDS ディスプレイインタフェースへ変換します。
FPD-Link トランスミッタ

Automotive Quality & Safety Standard

Support

技術サポート

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品質と信頼性

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