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  • MIPI CSI/DSI IP Core

    IP Core

    MIPI CSI/DSI IP Core

    The MIPI® CSI/DSI IP is the unified and re-architected MIPI IP that provides a flexible solution for transmission and reception of high-speed video data over a Mobile Industry Processor Interface (MIPI)-compatible D-PHY interface in FPGA designs.
    MIPI CSI/DSI IP Core
  • Embedded Vision Development Kit

    Board

    Embedded Vision Development Kit

    Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.
    Embedded Vision Development Kit
  • Advanced CNN Accelerator IP

    IP Core

    Advanced CNN Accelerator IP

    Calculates full layers of Neural Network including convolution layer, pooling layer, batch normalization layer, and fully connected layer.
    Advanced CNN Accelerator IP
  • MIPI CSI-2 to PCIe Reference Design

    Reference Design

    MIPI CSI-2 to PCIe Reference Design

    CertusPro™‑NX MIPI CSI‑2 to PCIe reference design streams camera video to a PC via DMA on the Versa Board, with Linux drivers and capture‑to‑display demo.
    MIPI CSI-2 to PCIe Reference Design
  • MIPI-to-Parallel and Parallel-to-MIPI Bridges Reference Design

    Reference Design

    MIPI-to-Parallel and Parallel-to-MIPI Bridges Reference Design

    ​​The design allows quick interface for a processor with a MIPI DSI with an RGB interface, or camera with MIPI CSI-2 to a processor with parallel interface​
    MIPI-to-Parallel and Parallel-to-MIPI Bridges Reference Design
  • CrossLink-NX Evaluation Board

    Board

    CrossLink-NX Evaluation Board

    For general evaluation and development with CrossLink-NX, includes many flexible interfaces such as FMC and PMOD with generous device IO access
    CrossLink-NX Evaluation Board
  • CNN Plus Accelerator IP Core

    IP Core

    CNN Plus Accelerator IP Core

    CNN Plus IP is a flexible accelerator IP that simplifies implementation of Ultra-Low power AI by leveraging capabilities of Lattice FPGAs.
    CNN Plus Accelerator IP Core
  • CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Reference Design

    CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Modular MIPI/D-PHY Reference Design - Multiple channel image data concatenated horizontally line by line and offers up to eight-channel aggregation.
    CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation
  • SLVS-EC to MIPI CSI-2 Reference Design

    Reference Design

    SLVS-EC to MIPI CSI-2 Reference Design

    Modular MIPI/D-PHY Reference Design - Support advance camera and display interconnections in mobile devices that enable higher performance sensor with optimized power.
    SLVS-EC to MIPI CSI-2 Reference Design
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