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  • CrossLink-NX Voice and Vision Machine Learning Board

    Board

    CrossLink-NX Voice and Vision Machine Learning Board

    Designed for low-power machine learning applications with Lattice sensAI and CrossLink-NX. Includes image sensors, microphones, HyperRAM, and expansion ports.
    CrossLink-NX Voice and Vision Machine Learning Board
  • HyperRAM Memory Controller Reference Design

    Reference Design

    HyperRAM Memory Controller Reference Design

    Implements First-Generation HyperRAM Specifications
    HyperRAM Memory Controller Reference Design
  • Future Electronics Hedgehog Development Board

    Board

    Future Electronics Hedgehog Development Board

    Future Electronics MachXO5-NX breakout board featuring LFMXO5-25-7BBG256C FPGA. Raspberry Pi, Arduino, MikroBus, PMOD, and MIPI camera/display interfaces.
    Future Electronics Hedgehog Development Board
  • CRUVI Certus-NX Base Board

    Board

    CRUVI Certus-NX Base Board

    Evaluation and development with Certus-NX FPGA, included are CRUVI HS/LS interface and 100mil pin headers for user IO, on-board USB JTAG/UART.
    CRUVI Certus-NX Base Board
  • IceZero

    Board

    IceZero

    Low-cost general purpose platform for the RaspberryPi with 4 MBit SRAM and four 2 x 6 PMOD interfaces for 32 3.3V LVCMOS IOs. Powered/configured over the 2 x 20 Raspberry Pi header.
    IceZero
  • icoBoard

    Board

    icoBoard

    Pin-compatible with Raspberry Pi 2 - B. Contains an 8K LUT, 100 MHz Lattice FPGA, 8 MBit of SRAM. Programmable in Verilog by a complete open source FPGA toolchain.
    icoBoard
  • ​​tinyCLUNX33 System on Module​

    Board

    ​​tinyCLUNX33 System on Module​

    ​​1x1" production ready, tightly integrated System on Module using Lattice CrossLinkU-NX (LIFCL-33U) to significantly reduce customers Time to Market.​
    ​​tinyCLUNX33 System on Module​
  • ​​Hyperbus Controller IP Core ​

    IP Core

    ​​Hyperbus Controller IP Core ​

    Citrobits' Hyperram memory controller was strategically designed with user accessibility as a top priority, leveraging the AXI 4 interface, widely adopted in modern system architectures.
    ​​Hyperbus Controller IP Core ​
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