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  • ​​Hyperbus Controller IP Core ​

    IP Core

    ​​Hyperbus Controller IP Core ​

    Citrobits' Hyperram memory controller was strategically designed with user accessibility as a top priority, leveraging the AXI 4 interface, widely adopted in modern system architectures.
    ​​Hyperbus Controller IP Core ​
  • Citrobits HyperRAM™ Reference Design

    Reference Design

    Citrobits HyperRAM™ Reference Design

    Performance-optimized reference design for HyperRAM™ Controller, using Lattice Propel for connecting it via AXI4 to RISC-V for memory intense applications.
    Citrobits HyperRAM™ Reference Design
  • LVM01-EVAboard

    Board

    LVM01-EVAboard

    Perfect for fast video prototyping, LVM01 aggregates up to 8 Camera/Display Interfaces. Compatible with Open LDI, CSI, DSI, LVDS, and Parallel standards.
    LVM01-EVAboard
  • RPC® MEMORY CONTROLLER

    IP Core

    RPC® MEMORY CONTROLLER

    Native or AXI4-Full interface with high-bandwidth Reduce Pin Count RPC® Memory. Integrated solution for video processing, buffering and AI applications.
    RPC® MEMORY CONTROLLER
  • EVA NEYEM01 BRIDGE BOARD

    Board

    EVA NEYEM01 BRIDGE BOARD

    Evaluation board powered with CBM100 FPGA module integrating ams OSRAM NanEyeM micro-cameras, enabling flexible, powerful vision system designs.
    EVA NEYEM01 BRIDGE BOARD
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