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  • CertusPro-NX Versa Board

    Board

    CertusPro-NX Versa Board

    CertusPro-NX Versa Board supports a wide range industry standards such as MIPI, SFP+, 10 GbE, LPDDR4 and PCIe (Gen3) for rapid prototyping and testing.
    CertusPro-NX Versa Board
  • Object Classification Demonstration

    Demo

    Object Classification Demonstration

    Sample demonstration for object detection, classification, and tracking multiple objects running on a low power general purpose FPGA using CNN Model
    Object Classification Demonstration
  • Object Classification Reference Design

    Reference Design

    Object Classification Reference Design

    A reference design for implementing object classification based on Mobilenet NN model running on Lattice CertusPro-NX low power FPGA
    Object Classification Reference Design
  • CertusPro-NX PCIe Bridge Board

    Board

    CertusPro-NX PCIe Bridge Board

    CertusPro-NX PCIe Bridge Board supports connectivity development platform enabling video bridge capabilities to PCIe and embedded vision type applications.
    CertusPro-NX PCIe Bridge Board
  • CertusPro-NX Voice and Vision Machine Learning Board

    Board

    CertusPro-NX Voice and Vision Machine Learning Board

    Design AI use cases for the Edge quickly! This board along with the Lattice sensAI solution stack provide the tools for developing vision and audio-based AI applications.
    CertusPro-NX Voice and Vision Machine Learning Board
  • Lattice ORAN™ Control Demonstration

    Demo

    Lattice ORAN™ Control Demonstration

    Lattice ORAN provides packet authentication, encryption and decryption and support SPDM protocol over MCTP.
    Lattice ORAN™ Control Demonstration
  • Lattice ORAN™ Control Reference Design

    Reference Design

    Lattice ORAN™ Control Reference Design

    Lattice ORAN enable secure out-of-band communication over I3C/SMBus/I2C/PCIe and provide crypto-256 and Crypto-384 services to customers through software APIs.
    Lattice ORAN™ Control Reference Design
  • PCI Express x1 & x4 IP Core for Nexus-based FPGAs

    IP Core

    PCI Express x1 & x4 IP Core for Nexus-based FPGAs

    The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.
    PCI Express x1 & x4 IP Core for Nexus-based FPGAs
  • Human Face Identification Reference Design

    Reference Design

    Human Face Identification Reference Design

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.
    Human Face Identification Reference Design
  • CNN Plus Accelerator IP

    IP Core

    CNN Plus Accelerator IP

    Implement Ultra-Low Power AI solutions with CNNs. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.
    CNN Plus Accelerator IP
  • CSI-2/DSI D-PHY Receiver

    IP Core

  • Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration

    Demo

    Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration

    This design demonstrates the functionality of transferring MIPI CSI-2 sensor video data to a computer through PCIe with a Direct Memory Access (DMA) engine.
    Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration
  • Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design

    Reference Design

    Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design

    Reference Design that shows transfer of sensor data to the computer memory and rendering of the data as video on the computer screen using the software driver.
    Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design
  • SLVS-EC Sensor to PCIe Bridge Demonstration

    Demo

    SLVS-EC Sensor to PCIe Bridge Demonstration

    The SLVS-EC RX IP provides the FPGA an interface to receive serial data from CMOS Image Sensors and offers a solution to convert the incoming serial data to a parallel pixel data format.
    SLVS-EC Sensor to PCIe Bridge Demonstration
  • SLVS-EC Sensor to PCIe Bridge Reference Design

    Reference Design

    SLVS-EC Sensor to PCIe Bridge Reference Design

    Reference Design that receives serial data from CMOS Image Sensors and convert the incoming serial data to vDMA/PCIe Subsystem data format.
    SLVS-EC Sensor to PCIe Bridge Reference Design
  • SubLVDS Image Sensor Receiver

    IP Core

    SubLVDS Image Sensor Receiver

    Modular MIPI/D-PHY IP - Converts SubLVDS Image Sensor Video Stream to Pixel Clock Domain
    SubLVDS Image Sensor Receiver
  • CSI-2 PCIe Bridge Demonstration

    Demo

    CSI-2 PCIe Bridge Demonstration

    This design demonstrates the functionality of transferring MIPI CSI-2 camera video data to computer via PCIe with a Direct Memory Access (DMA) engine.
    CSI-2 PCIe Bridge Demonstration
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