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  • Scene Segmentation Reference Design

    Reference Design

    Scene Segmentation Reference Design

    Efficient and low power approach for implementing scene segmentation using Lattice CrossLink-NX FPGA
    Scene Segmentation Reference Design
  • PCIe Basic Demo on Crosslink-NX PCIe Bridge Board

    Demo

    PCIe Basic Demo on Crosslink-NX PCIe Bridge Board

    The PCIe Basic Demo allows you to control three 7 segment LEDs and manipulate the onboard memory of the FPGA through the PCIe slot.
    PCIe Basic Demo on Crosslink-NX PCIe Bridge Board
  • PCIe Colorbar Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Colorbar Demo for Lattice Nexus-based FPGAs

    Demo that displays a series of moving colorbars by streaming the image data using DMA transfers from the FPGA to the host system.
    PCIe Colorbar Demo for Lattice Nexus-based FPGAs
  • PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

    The PCI Express DMA Throughput Demo allows to initiate DMA read and write transactions, transferring data from the host to the FPGA and vice versa.
    PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs
  • PCIe Multifunction Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Multifunction Demo for Lattice Nexus-based FPGAs

    Demonstrates the multifunction capabilities of the Crosslink-NX FPGA that allows access to GPIO, MDIO and I2C registers.
    PCIe Multifunction Demo for Lattice Nexus-based FPGAs
  • CrossLink-NX-33 Voice and Vision Machine Learning Board

    Board

    CrossLink-NX-33 Voice and Vision Machine Learning Board

    Designed for low-power machine learning applications with Lattice sensAI and CrossLink-NX-33. Includes expansion ports and audio-based AI applications tools.
    CrossLink-NX-33 Voice and Vision Machine Learning Board
  • SFB Interface IP Core

    IP Core

    SFB Interface IP Core

    SFB allow access to AHB-L CPLD block , management CPU recovery circuit and Flash sector for read/write.
    SFB Interface IP Core
  • Lattice Sentry QSPI Monitor IP Core for MachXO3D

    IP Core

    Lattice Sentry QSPI Monitor IP Core for MachXO3D

    Propel IP Module for Lattice Sentry: Monitors traffic on SPI/QSPI bus to identify and block potentially illegal traffic.
    Lattice Sentry QSPI Monitor IP Core for MachXO3D
  • Lattice Sentry QSPI Streamer IP Core for MachXO3D

    IP Core

    Lattice Sentry QSPI Streamer IP Core for MachXO3D

    Propel IP Module for Lattice Sentry: Provides fast SPI memory access for firmware authentication as part fo Platform Root of Trust operation
    Lattice Sentry QSPI Streamer IP Core for MachXO3D
  • Lattice Sentry Root of Trust Reference Design for Mach-NX

    Reference Design

    Lattice Sentry Root of Trust Reference Design for Mach-NX

    This design utilizes Platform Firmware Resiliency System Root of Trust to help develop and test a complete NIST 800-193 compliant security system that protects, detects, and recovers.
    Lattice Sentry Root of Trust Reference Design for Mach-NX
  • Lattice ORAN™ Control Demonstration

    Demo

    Lattice ORAN™ Control Demonstration

    Lattice ORAN provides packet authentication, encryption and decryption and support SPDM protocol over MCTP.
    Lattice ORAN™ Control Demonstration
  • Lattice ORAN™ Control Reference Design

    Reference Design

    Lattice ORAN™ Control Reference Design

    Lattice ORAN enable secure out-of-band communication over I3C/SMBus/I2C/PCIe and provide crypto-256 and Crypto-384 services to customers through software APIs.
    Lattice ORAN™ Control Reference Design
  • MachXO5™-NX Development Board

    Board

    MachXO5™-NX Development Board

    Allows designers to work with features of MachXO5-25 and L-ASC10 hardware management expander to assist in rapid prototyping and testing of specific designs
    MachXO5™-NX Development Board
  • User Background Blurring Demostration

    Demo

    User Background Blurring Demostration

    Efficient and low power approach for implementing user background blurring using Lattice CrossLink-NX FPGA
    User Background Blurring Demostration
  • SLVS-EC to HDMI Demo for CertusPro-NX

    Demo

    SLVS-EC to HDMI Demo for CertusPro-NX

    The single camera SLVS-EC to HDMI demonstration uses IMX535 image sensor to output 1080p video and extracts the video pixels which is then displayed on HDMI.
    SLVS-EC to HDMI Demo for CertusPro-NX
  • SPI Flash Memory Controller IP Core

    IP Core

    SPI Flash Memory Controller IP Core

    The Serial Peripheral Interface (SPI) flash memory controller provides an industry-standard interface between a central processing unit (CPU) and an off-chip SPI flash memory device.
    SPI Flash Memory Controller IP Core
  • MAS LIFCL Evaluation Board

    Board

    MAS LIFCL Evaluation Board

    This modular, flexible and easy-to-use CrossLink-NX 17 board is designed for video applications, including CSI2 MIPI, LVDS HDMI (through PMOD).
    MAS LIFCL Evaluation Board
  • SDI to MIPI CSI-2 Bridge by Antmicro

    Board

    SDI to MIPI CSI-2 Bridge by Antmicro

    This device using Lattice CrossLink LIF-MD6000-6KMG80I that enables connecting industrial and filmmaking cameras and video accessories to edge AI platforms which often include the MIPI CSI-2 interface.
    SDI to MIPI CSI-2 Bridge by Antmicro
  • SPI Master IP Core

    IP Core

    SPI Master IP Core

    Communicates with external SPI slave devices. Configurable data width, FIFO Tx/Rx depth, polarity, clocking modes and memory interface.
    SPI Master IP Core
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