Octal SPI Controller IP Core

Versatile Octal SPI IP: Supports Standard, Dual, Quad & xSPI Protocols

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The Lattice Octal SPI Controller IP is an SPI interface that supports different types of SPI protocols: standard, dual, quad, and xSPI. Standard SPI is the legacy four-wire interface with separate data lines for input and output. Dual SPI (DSPI) is an extension of standard SPI using two data lines. Quad SPI (QSPI) is another extension of standard SPI designed to provide a higher data transfer rate using four data lines. Expanded SPI (xSPI) is an advanced extension of standard SPI designed to provide higher data throughput and improved performance while maintaining backward compatibility with standard SPI devices. xSPI uses eight data lines and is capable of double data rate transfer.

Resource Utilization details are available in the IP Core User Guide.

Features

  • JEDEC JESD251C standard xSPI (x8, double transfer rate) support.
  • SPI (x1), dual SPI (x2), and quad SPI (x4) support.
  • AMBA AXI4 protocol bus interface:
    • 32-bit data and 32-bit address
    • Single and burst transfers
  • SPI clock frequencies up to 200 MHz.
  • Double transfer rates up to 400 MT/s with 200 MHz clock.

Jump to

Block Diagram

Ordering Information

The Octal SPI Controller IP is provided at no additional cost with the Lattice Radiant™ software.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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Octal SPI Controller IP User Guide
FPGA-IPUG-02273 1.1 12/20/2024 PDF 1.9 MB
Octal SPI Controller IP Release Notes
FPGA-RN-02011 1.1 12/20/2024 PDF 186.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Octal SPI Controller IP User Guide
FPGA-IPUG-02273 1.1 12/20/2024 PDF 1.9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Octal SPI Controller IP Release Notes
FPGA-RN-02011 1.1 12/20/2024 PDF 186.6 KB

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