QSPI Flash Controller IP Core

Four Times Enhanced Throughput of a Standard SPI

The Lattice QSPI Flash Controller IP core supports the SPI, DSPI, and QSPI protocols. A Quad Serial Peripheral Interface (QSPI) is a four-tri-state data line serial interface that is commonly used to program, erase, and read SPI Flash memories. QSPI enhances the throughput of a standard SPI by four times since four bits are transferred every clock cycle.

The design is implemented in Verilog HDL. The Lattice QPSI Flash Controller IP can be generated and configured using Lattice Propel™ Builder software. The IP supports Lattice Nexus™ and Avant™ devices.

Applicable for Different Bus Interfaces – (1) AMBA 3 AHB-Lite Protocol v1.0; (2) AMBA AXI4-Lite Protocol; (3) AMBA AXI4 Protocol.

Supports Flash Commands – Supports flash commands that allow access and control to configuration, function and other write registers.

Allows Communication with Multiple External SPI flash Devices - The QSPI Flash Controller IP Core allows the host inside the FPGA to communicate with multiple external SPI flash devices using either standard, extended dual/quad, dual, or quad SPI protocols.

Features

  • Scalable performance: 1x, 2x, 4x I/O widths
  • Programmable SPI clock phase and polarity
  • Programmable serial clock frequency
  • Optional use of transmit and receive FIFOs with configurable FIFO Depth
  • RISC V QSPI code little endian and code execution

Block Diagram

Resource Utilization

Avant Family
LAV-AT-E70
Interface Registers LUTs EBRs Synthesis Tools
AHB-Lite 1412 2682 0 Synplify Pro 2022.1
AHB-Lite + AXI4-Lite 1542 2741 0 Synplify Pro 2022.1
AXI4 1768 3407 0 Synplify Pro 2022.1
AXI4 + AXI4-Lite 1854 3461 0 Synplify Pro 2022.1
Nexus Family
LFCPNX-100
Interface Registers LUTs EBRs Synthesis Tools
AHB-Lite 1463 2667 0 Synplify Pro 2022.1
AHB-Lite + AXI4-Lite 1544 2721 0 Synplify Pro 2022.1
AXI4 1766 3392 0 Synplify Pro 2022.1
AXI4 + AXI4-Lite 1850 3441 0 Synplify Pro 2022.1

Ordering Information

The QSPI Flash Controller IP Core can be generated and configured in Lattice Propel™ Builder software free of charge.

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
QSPI Flash Controller IP Core - User Guide
FPGA-IPUG-02248 1.0 12/5/2023 PDF 1.4 MB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.