Lattice Sentry QSPI Monitor IP Core for MachXO3D

Resilient SPI/QSPI Security IP for Platform Firmware Resiliency

Related Products

Actively Prevent Attacks Against SPI/QSPI Peripherals – The Sentry QSPI Monitor IP for MachXO3D monitors traffic on SPI/QSPI bus to identify and block potentially illegal traffic.

Nanosecond Response Time – This FPGA IP continually monitors traffic and responds to threats instantly.

Tested and Fully Validated – This resilient IP is a pre-built security component which is part of the Lattice Sentry Platform Root of Trust solutions stack. No FPGA experience or RTL programming is necessary to implement this into your Platform Root of Trust design.

Features

  • Generation of SPI and QSPI transactions
  • Support for long SPI transactions (up to 256 byte write and 4 Gb read) with no CPU interactions
  • Programmable transaction type and length
  • Provision of 8-bit external FIFO interface for connecting to other blocks
  • Support for AMBA 3 APB Protocol v1.0
Lattice Sentry

Block Diagram

Customer PLD Interface Block Diagram

Ordering Information

  Part Number
Device Family Multi-site Perpetual Single Seat Annual
MachXO3D SENTRY-PFR-XO3D-UT -
Mach-NX SENTRY-PFR-LFMNX-UT -

Device Family Part Number Description
MachXO3D SECURITY-XO3D-SW MachXO3D Encryption Security Block License

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
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QSPI Monitor IP Core for MachXO3D - Lattice Propel Builder
FPGA-IPUG-02110 1.2 10/22/2023 PDF 694.5 KB

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