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  • PCI Express x1, x4 Root Complex Lite IP Core

    IP Core

    PCI Express x1, x4 Root Complex Lite IP Core

    Provides a PCI Express x1 and x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack
    PCI Express x1, x4 Root Complex Lite IP Core
  • CertusPro-NX Versa Board

    Board

    CertusPro-NX Versa Board

    CertusPro-NX Versa Board supports a wide range industry standards such as MIPI, SFP+, 10 GbE, LPDDR4 and PCIe (Gen3) for rapid prototyping and testing.
    CertusPro-NX Versa Board
  • Certus-N2 Evaluation Board

    Board

    Certus-N2 Evaluation Board

    Certus-N2 Evaluation Board is designed for evaluating and developing with the Certus-N2 family and supports 16G Serdes, LPDDR4, PCI-Gen4.
    Certus-N2 Evaluation Board
  • Secure Connected Motion Control Platform

    Reference Design

    Secure Connected Motion Control Platform

    ​​This platform offers resilient connectivity, low power consumption, high performance, and robust security is increasing across various industries.​
    Secure Connected Motion Control Platform
  • PCIe Basic Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Basic Demo for Lattice Nexus-based FPGAs

    The PCIe Basic Demo allows you to control three 7 segment LEDs and manipulate the onboard memory of the FPGA through the PCIe slot.
    PCIe Basic Demo for Lattice Nexus-based FPGAs
  • PCIe Colorbar Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Colorbar Demo for Lattice Nexus-based FPGAs

    PCIe Colorbar Demo displays a series of moving colorbars by streaming the image data using DMA transfers from the FPGA to the host system.
    PCIe Colorbar Demo for Lattice Nexus-based FPGAs
  • PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

    The PCI Express DMA Throughput Demo allows to initiate DMA read and write transactions, transferring data from the host to the FPGA and vice versa.
    PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs
  • PCIe Multifunction Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Multifunction Demo for Lattice Nexus-based FPGAs

    Demonstrates the multifunction capabilities of the Crosslink-NX FPGA that allows access to GPIO, MDIO and I2C registers.
    PCIe Multifunction Demo for Lattice Nexus-based FPGAs
  • CertusPro-NX PCIe Bridge Board

    Board

    CertusPro-NX PCIe Bridge Board

    The CertusPro-NX PCIe Bridge Board enables video bridge capabilities to PCIe and embedded vision type applications.
    CertusPro-NX PCIe Bridge Board
  • PCI Express for Nexus FPGAs

    IP Core

    PCI Express for Nexus FPGAs

    The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.
    PCI Express for Nexus FPGAs
  • PCI Express for Avant FPGAs

    IP Core

    PCI Express for Avant FPGAs

    The Lattice PCIe X8 IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.
    PCI Express for Avant FPGAs
  • Certus-NX Versa Evaluation Board

    Board

    Certus-NX Versa Evaluation Board

    The Certus-NX Versa Evaluation Board enables designers with connectivity features of the Certus-NX FPGA and assist engineers with prototyping and testing.
    Certus-NX Versa Evaluation Board
  • Demo for Lattice ORAN Secure Sync for IEEE 1588 PTP

    Demo

    Demo for Lattice ORAN Secure Sync for IEEE 1588 PTP

    Demo for Lattice ORAN Secure Sync show how Lattice FPGA w/ soft IPs can support tight & secure synchronization using 1588 PTP & ITU profiles for Telecom.
    Demo for Lattice ORAN Secure Sync for IEEE 1588 PTP
  • Lattice mVision DisplayPort to PCIe Demonstration

    Demo

    Lattice mVision DisplayPort to PCIe Demonstration

    DisplayPort to PCIe bridge design demonstrates the functionality of transferring DisplayPort video data to a computer through PCIe with a DMA engine.
    Lattice mVision DisplayPort to PCIe Demonstration
  • Lattice ORAN™ 1.0 Security Reference Design

    Reference Design

    Lattice ORAN™ 1.0 Security Reference Design

    Lattice ORAN enable secure out-of-band communication over I3C/SMBus/I2C/PCIe and provide crypto-256 and Crypto-384 services to customers through software APIs.
    Lattice ORAN™ 1.0 Security Reference Design
  • Lattice ORAN™ Control Demonstration

    Demo

    Lattice ORAN™ Control Demonstration

    Lattice ORAN provides packet authentication, encryption and decryption and support SPDM protocol over MCTP.
    Lattice ORAN™ Control Demonstration
  • 5G Small Cell PCIe to JESD204B Bridge Reference Design

    Reference Design

    5G Small Cell PCIe to JESD204B Bridge Reference Design

    5G Mid-Power Integrated Small Cell, reference platform is a comprehensive development board tailored for 5G baseband processors and transceiver frontends.
    5G Small Cell PCIe to JESD204B Bridge Reference Design
  • Lattice ORAN IEEE 1588 PTP Secure Sync Reference Design

    Reference Design

    Lattice ORAN IEEE 1588 PTP Secure Sync Reference Design

    Lattice ORAN 1.1 RD shows how to provide ultra-reliable time synchronization & phase alignment for delivering timing accuracy in 5G ORAN networks.
    Lattice ORAN IEEE 1588 PTP Secure Sync Reference Design
  • Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration

    Demo

    Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration

    This design demonstrates the functionality of transferring MIPI CSI-2 sensor video data to a computer through PCIe with a Direct Memory Access (DMA) engine.
    Lattice mVision MIPI Video Sensor to PCIe Bridge Demonstration
  • Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design

    Reference Design

    Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design

    Reference Design that shows transfer of sensor data to the computer memory and rendering of the data as video on the computer screen using the software driver.
    Lattice mVision MIPI Video Sensor to PCIe Bridge Reference Design
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