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General Purpose
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Clear All
Demo
Demo for Lattice ORAN Secure Sync for IEEE 1588 PTP
Demo for Lattice ORAN Secure Sync show how Lattice FPGA w/ soft IPs can support tight & secure synchronization using 1588 PTP & ITU profiles for Telecom.
CertusPro-NX
Lattice ORAN
,
PCIe
,
SFP
,
SERDES
,
FMC
,
IEEE1588
,
5G
Board
Lattice ORAN Timing and Synchronization Kit
ORAN Sync Board has 2x 10GE & 2x 1GE ports, SMA & FMC connectors for testing, demos, development, GNSS & on-board timing sources, ToD, & PPS RJ48 connectors
CertusPro-NX
5G
,
Lattice ORAN
,
FMC
,
SMA
,
IEEE1588
,
SDR
Reference Design
Lattice ORAN IEEE 1588 PTP Secure Sync Reference Design
Lattice ORAN 1.1 RD shows how to provide ultra-reliable time synchronization & phase alignment for delivering timing accuracy in 5G ORAN networks.
CertusPro-NX
Lattice ORAN
,
PCIe
,
SFP
,
SERDES
,
FMC
,
IEEE1588
,
SDR
IP Core
5G O-RU L-PHY & H-PHY IP Cores
Yongatek's L-PHY IP in Lattice CertusPro-NX FPGA: 3GPP TS38.212 Release 16 compatible, O-RAN Alliance compliant, up to 6GHz, ideal for mid-power RF apps.
CertusPro-NX
CFR
,
CPRI
,
CRC
,
Data Communication
,
Data Compression
,
DSP
,
DUC
,
IEEE1588
,
AXI
,
SPI
IP Core
Adjustable Counter Clock
The adjustable clock IP is a counter clock that can be adjusted with offset and drift corrections to follow another clock.
Certus-NX
,
CertusPro-NX
,
ECP5 / ECP5-5G
IEEE1588
,
AXI
,
Time Synchronization
IP Core
Time Sensitive Networking (TSN) End Node
The Time Sensitive Networking (TSN) End Node IP supports scheduling, priority queues, credit shaping, cyclic forwarding and preemption.
Certus-NX
,
CertusPro-NX
,
ECP5 / ECP5-5G
IEEE1588
,
IEEE802.1
,
Data Communication
,
Ethernet
,
IEEE 802.3
,
AXI
,
TSN
IP Core
Time Sensitive Networking (TSN) Network Node
Time Sensitive Networking (TSN) Switched End Node IP supports 3 Ports, scheduling, priority queues, credit shaping, redundancy, cyclic forwarding and preemption
Certus-NX
,
CertusPro-NX
,
ECP5 / ECP5-5G
IEEE1588
,
IEEE802.1
,
Data Communication
,
Ethernet
,
IEEE 802.3
,
AXI
,
TSN
IP Core
TSN-EP – TSN Ethernet Endpoint Controller
Highly flexible core supports timing synchronization (IEEE 802.1AS), traffic shaping (IEEE 802.1Qav, Qbv) and frame-preemption (IEEE 802.1Qbu, & 802.3br).
MachXO2
,
MachXO3
,
iCE40 Ultra / UltraLite
,
iCE40 UltraPlus
,
LatticeECP3
,
ECP5 / ECP5-5G
,
Certus-NX
,
CrossLink-NX
IEEE1588
,
Ethernet
,
IEEE 802.3
,
Automotive
,
Functional Safety
,
TSN
IP Core
IEEE 1588 Syn1588®Clock_M Core
Highly accurate clock synchronization compliant to the IEEE 1588 standard version 1.0 and 2.0 for Industrial Ethernet applications.
LatticeXP2
Ethernet
,
IEEE1588
IP Core
IEEE 1588 Syn1588®Clock_S Core
Highly accurate clock synchronization compliant to the IEEE 1588 standard version 1.0 and 2.0 for Industrial Ethernet applications
LatticeXP2
Ethernet
,
IEEE1588
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