SFB Interface IP Core

SoC Functional Block Interface IP Core

The SFB (SoC Functional Block) Interface component is used in the PFR (Platform Firmware Resiliency) 3.0 for the Lattice Mach™-NX family of devices.

Access to Management CPU Recovery Circuit - CPU Recovery is a special circuit used to simplify sending Recovery FW Code from inside a CFG flash sector to an address in SPI flash in the event of a boot failure.

Access to the Flash sector for Read/Write and Erase functions - CPLD Flash Access is an API that allows you to write, read, and erase information to/from the internal flash memory.

Features

  • Access to the AHB-L customer PLD block implemented in soft logic
  • AHB-L Interface
  • Compatibility with Propel software
  • Support Multiple sector erase
  • SFB Interface supports writing special registers in Register Only mode

Block Diagram

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice Sentry SFB Interface IP Core - User's Guide
FPGA-IPUG-02151 1.3 12/16/2021 PDF 1.1 MB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

Like most websites, we use cookies and similar technologies to enhance your user experience. We also allow third parties to place cookies on our website. By continuing to use this website you consent to the use of cookies as described in our Cookie Policy.