SFB Interface IP Core

SoC Functional Block Interface IP Core

The SFB (SoC Functional Block) Interface component is used in the PFR (Platform Firmware Resiliency) 3.0 for the Lattice Mach™-NX family of devices.

Access to Management CPU Recovery Circuit - CPU Recovery is a special circuit used to simplify sending Recovery FW Code from inside a CFG flash sector to an address in SPI flash in the event of a boot failure.

Access to the Flash sector for Read/Write and Erase functions - CPLD Flash Access is an API that allows you to write, read, and erase information to/from the internal flash memory.


  • Access to the AHB-L customer PLD block implemented in soft logic
  • AHB-L Interface
  • Compatibility with Propel software
  • Support Multiple sector erase
  • SFB Interface supports writing special registers in Register Only mode

Block Diagram


Quick Reference
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Lattice Sentry SFB Interface IP Core - User Guide
This document would be provided through Technical Support Request after sign-in to Lattice web site. Please refer to Answer Database FAQ 6848 for detail instruction.
FPGA-IPUG-02151 12/27/2023 WEB

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