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  • MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption

    Reference Design

    MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption

    Shows how to use the MachXO3D Embedded Security Block (ESB) to implement AES128 or AES256 encryption or decryption.
    MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption
  • AES256-CTR, High-speed (XIP1103H)

    IP Core

    AES256-CTR, High-speed (XIP1103H)

    The high-speed AES256-CTR effectively turns a block cipher into a stream cipher, providing a number of advantages from an implementation point of view.
    AES256-CTR, High-speed (XIP1103H)
  • Crypto Module (XIP7500)

    IP Core

    Crypto Module (XIP7500)

    Xiphera’s Crypto Module is an integrated security platform enabling customised set of highly-optimised cryptographic services for microcontrollers or SoC implementations.
    Crypto Module (XIP7500)
  • MACsec AES256-GCM, High-speed (XIP1213H)

    IP Core

    MACsec AES256-GCM, High-speed (XIP1213H)

    The high-speed MACsec IP core implements the MACsec protocol as standardized in IEEE 802.1AE-2018, defining a security infrastructure for OSI model Layer 2 traffic.
    MACsec AES256-GCM, High-speed (XIP1213H)
  • AES256-GCM, Balanced (XIP1113B)

    IP Core

    AES256-GCM, Balanced (XIP1113B)

    The balanced AES256-GCM implements the AES in Galois Counter Mode: a widely used cryptographic algorithm for Authenticated Encryption with Associated Data purposes.
    AES256-GCM, Balanced (XIP1113B)
  • AES256-GCM, High-speed (XIP1113H)

    IP Core

    AES256-GCM, High-speed (XIP1113H)

    The high-speed AES256-GCM implements the AES in Galois Counter Mode: a widely used cryptographic algorithm for Authenticated Encryption with Associated Data purposes.
    AES256-GCM, High-speed (XIP1113H)
  • AES256-XTS, Balanced (XIP1183B)

    IP Core

    AES256-XTS, Balanced (XIP1183B)

    The balanced AES-XTS IP core implements the Advanced Encryption Standard (AES) with 256 bits long key in XTS mode.
    AES256-XTS, Balanced (XIP1183B)
  • MACsec AES256-GCM, Balanced (XIP1213B)

    IP Core

    MACsec AES256-GCM, Balanced (XIP1213B)

    The balanced MACsec IP core implements the MACsec protocol as standardized in IEEE 802.1AE-2018, defining a security infrastructure for OSI model Layer 2 traffic.
    MACsec AES256-GCM, Balanced (XIP1213B)
  • Versatile AES-256, Balanced (XIP1123B)

    IP Core

    Versatile AES-256, Balanced (XIP1123B)

    The balanced Versatile AES-256 IP core implements the Advanced Encryption Standard (AES) with a 256-bit key in five dynamically selectable modes of operation.
    Versatile AES-256, Balanced (XIP1123B)
  • Fast AES Core

    IP Core

    Fast AES Core

    Implements AES (Rijndael) to latest NIST FIPS PUB 197. Full dynamic support for all AES key sizes (128, 192 and 256-bits)
    Fast AES Core
  • Standard AES Core

    IP Core

    Standard AES Core

    A mid-rate solution, aimed at applications which require a few hundred Mbps throughput, whilst offering a really efficient area footprint (NIST FIPS PUB 197)
    Standard AES Core
  • Tiny AES Core

    IP Core

    Tiny AES Core

    Implements AES (Rijndael) to latest NIST FIPS PUB 197 using the minimum FPGA resources.
    AES 
    Tiny AES Core
  • CLP-03 AES

    IP Core

    CLP-03 AES

    Fully supports the AES algorithm for all three key sizes
    CLP-03 AES
  • CLP-11 Tiny AES

    IP Core

    CLP-11 Tiny AES

    Fully supports the AES algorithm for all key sizes with a small footprint
    CLP-11 Tiny AES
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