The Lattice Enhanced Serial Peripheral Interface (eSPI) Target IP is compliant with the Intel eSPI specifications. It has its own virtual wire channel in the user interface while implementing peripheral channels, namely, Out of Band (OOB) Message Channel and Flash Access Channel in FIFO that are accessible by the Advanced Peripheral Bus (APB) or Advanced High-Performance Bus – Lite (AHB-Lite) interface.
Resource Utilization details are available in the IP Core User Guide.