AHB-Lite Interconnect Module

A Parameterized Soft IP Offering High-Performance, Low-Latency AMBA 3 AHB-Lite Fabric

The Lattice Semiconductor AHB-Lite Interconnect Module is a fully parameterized soft IP, high performance, low latency interconnect fabric for AMBA 3 AHB-Lite based systems, enabling one or more managers to be connected to one or more subordinates.

Resource Utilization details are available in the IP Core User Guide.

Features

  • Burst transfers: one address phase followed by multiple data phases, where each data phase is called a beat. 4/8/16-beat wrapping and incrementing bursts are supported. Incrementing bursts of undefined length are also supported.
  • Single-clock edge operation
  • Non-tristate implementation
  • Wide data bus configurations: 64, 128, 256, 512, or 1024 bits wide
Lattice Propel

Block Diagram

AHB-Lite Interconnect Module Block Diagram

Ordering Information

The AHB-Lite Interconnect Module IP is provided at no additional cost with Lattice Propel Builder.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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AHBL Master BFM Lite VIP - Lattice Propel Builder
FPGA-IPUG-02148 1.0 12/8/2020 PDF 808.5 KB
AHB-Lite Interconnect Module - User Guide
FPGA-IPUG-02051 1.4 2/5/2025 PDF 547.3 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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AHB-Lite Interconnect Module Release Notes
FPGA-RN-02044 1.1 2/5/2025 PDF 202.7 KB

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