莱迪思解决方案

IP Core

FFT 编译器

The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, Certus-NX, CertusPro-NX, MachXO5-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

Data Communication, DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

FIR 滤波器生成器

可灵活配置的多通道FIR滤波器。最多支持256个通道，每个拥有2048个抽头。输入和系数宽度为4至32位。

ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

JESD204B IP核

莱迪思JESD204B IP核是用于数据转换器和FPGA器件之间的高速串行接口，用于取代传统接口。

ECP5 / ECP5-5G, LatticeECP3, CertusPro-NX, Avant-G, Avant-X 

ADC/DAC, DSP, SDR 

IP Core

10Gb Ethernet MAC+PHY IP Core

The Lattice 10G Ethernet (GbE) IP core supports the ability to transmit and receive data between a host processor and an Ethernet network.

Avant-G, Avant-X, CertusPro-NX 

Ethernet, PCS, XGMII, AXI4, Ethernet Bundle, SDR 

IP Core

25Gb以太网MAC+PHY IP核

莱迪思半导体的25G以太网（GbE）IP核支持在主机处理器和以太网网络之间发送和接收数据。

Avant-X 

Ethernet, Lattice Avant, IEEE 802.3, Ethernet Bundle, SDR 

IP Core

PCI Express x1、x4 Root Complex Lite IP核

Provides a PCI Express x1 and x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M 

PCIe, Guidance Systems, Automotive, PCIe Bundle, SDR 

IP Core

Image Signal Processing IP Cores Suite

The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.

CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E 

AXI, AXI-Stream, AXI-Lite Interface, AWB, Camera, CCM, CFA Interpolation, Debayer, Image Processing, Image Signal Processing, Lattice mVision, RGB, Defense 

Reference Design

GHRD/GSRD参考设计

黄金硬件和软件参考设计（GSRD）包括了使用基于CertusPro-NX Versa开发板开发各种应用所需的组件。

CertusPro-NX, Avant-E 

GHRD, GSRD, RISC-V, AXI4, MPMC, Lattice Automate, Defense 

IP Core

MACsec AES256-GCM, High-speed (XIP1213H)

The high-speed MACsec IP core implements the MACsec protocol as standardized in IEEE 802.1AE-2018, defining a security infrastructure for OSI model Layer 2 traffic.

Avant-E, Avant-G, Avant-X 

AES, Encryption, NIST, Security, ECC, Public/Private Key, SHA, SDR 

IP Core

QSPI闪存控制器IP核

QSPI闪存控制器IP可以通过标准、扩展的双/四、双或四通道SPI协议与多个外部SPI闪存器件进行通信。

Avant-E, Avant-G, Avant-X, CertusPro-NX, Certus-NX, Certus-N2 

QSPI, SPI Flash, SPI, Flash 

Reference Design

Secure Connected Motion Control Platform

​​This platform offers resilient connectivity, low power consumption, high performance, and robust security is increasing across various industries.​

CertusPro-NX, MachXO3D 

LPDDR4, PCIe, RoT, PMOD, FMC, FTDI, ADC/DAC 

IP Core

USB 2.0/3.2 IP核

莱迪思USB 2.0/3.2 IP核提供了一种连接USB主机的解决方案，适用于莱迪思CrossLink-NX FPGA最新器件。

CrossLink-NX 

USB, USB2, USB3, AHB, AHB-L, AHB-Lite, AXI, I2C, SPI, JTAG, LVDS, SLVS, FTDI 

Reference Design

USB到I/O聚合和桥接参考设计

USB到I/O桥接参考设计为支持USB的FPGA提供即插即用外设扩展，还支持从USB到I2C、SPI和GPIO的信号协议转换。

CrossLink-NX 

USB, USB2, USB3, I2C, SPI, JTAG, LVDS, SLVS, FTDI 

演示

GHRD/GSRD Demonstration

The Golden Hardware and Software Reference Design comprises of components for developing various kind of applications using CertusPro-NX Versa Board.

CertusPro-NX, Avant-E 

GHRD, GSRD, RISC-V, AXI4, MPMC, Lattice Automate, Defense 

IP Core

ML-KEM-512/768/1024 (CRYSTALS-Kyber), Balanced (XIP6110B)

ML-KEM-512/768/1024 is an IP core for post-quantum Key Encapsulation Mechanism (KEM), optimized for a good balance between speed and resource requirements.

Avant-E, Avant-G, Avant-X, CertusPro-NX, ECP5 / ECP5-5G 

Encryption, NIST, Public/Private Key, Security, SDR 

演示

用户追踪和旁观者检测演示

该演示示例使用CNN模型，在低功耗通用FPGA上运行，可检测和追踪多个人脸

CrossLink-NX 

Machine Learning/AI, Lattice sensAI, Image Processing, Camera, FaceI dentification 

Reference Design

目标分类参考设计

该参考设计展示了在网络边缘设备应用中实现基于机器学习的目标分类示例。

CertusPro-NX, Avant-E, CrossLink-NX 

Machine Learning/AI, Lattice sensAI, Object Detection, Object Identification, Space 

演示

目标分类演示

该演示提供了在CertusPro-NX FPGA上运行的检测、分类和追踪多个目标的应用示例。

CertusPro-NX, Avant-E 

Machine Learning/AI, Lattice sensAI, Object Detection, Object Identification, Space 

演示

MachXO5-NX and L-ASC10 Platform Power Management Using RISC-V Demonstration

This demo illustrates L-ASC10 integration in a MachXO5-NX design and demonstrates RISC-V SOC interfacing with power sequencing and fault response.

MachXO5-NX 

L-ASC10, RISC-V, Defense, SDR 

演示

莱迪思图像信号处理演示

为嵌入式视觉开发套件提供基于ECP5 FPGA的完整ISP示例设计，非常适合工业、医疗和汽车应用。

ECP5 / ECP5-5G, CertusPro-NX 

Image Signal Processing, Lattice mVision, Space, Defense