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  • Unified Interconnect IP Core

    IP Core

    Unified Interconnect IP Core

    A high-performance and low-latency interconnect fabric for AXI4- and AXI4-Lite-based systems.
    Unified Interconnect IP Core
  • FFT 编译器

    IP Core

    FFT 编译器

    The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.
    FFT 编译器
  • FIR 滤波器生成器

    IP Core

    FIR 滤波器生成器

    可灵活配置的多通道FIR滤波器。最多支持256个通道,每个拥有2048个抽头。输入和系数宽度为4至32位。
    FIR 滤波器生成器
  • Image Signal Processing IP Cores Suite

    IP Core

    Image Signal Processing IP Cores Suite

    The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.
    Image Signal Processing IP Cores Suite
  • GHRD/GSRD参考设计

    Reference Design

    GHRD/GSRD参考设计

    黄金硬件和软件参考设计(GSRD)包括了使用基于CertusPro-NX Versa开发板开发各种应用所需的组件。
  • MACsec AES256-GCM, High-speed (XIP1213H)

    IP Core

    MACsec AES256-GCM, High-speed (XIP1213H)

    The high-speed MACsec IP core implements the MACsec protocol as standardized in IEEE 802.1AE-2018, defining a security infrastructure for OSI model Layer 2 traffic.
    MACsec AES256-GCM, High-speed (XIP1213H)
  • QSPI闪存控制器IP核

    IP Core

    QSPI闪存控制器IP核

    QSPI闪存控制器IP可以通过标准、扩展的双/四、双或四通道SPI协议与多个外部SPI闪存器件进行通信。
  • GHRD/GSRD Demonstration

    演示

    GHRD/GSRD Demonstration

    The Golden Hardware and Software Reference Design comprises of components for developing various kind of applications using CertusPro-NX Versa Board.
    GHRD/GSRD Demonstration
  • ML-KEM-512/768/1024 (CRYSTALS-Kyber), Balanced (XIP6110B)

    IP Core

    ML-KEM-512/768/1024 (CRYSTALS-Kyber), Balanced (XIP6110B)

    ML-KEM-512/768/1024 is an IP core for post-quantum Key Encapsulation Mechanism (KEM), optimized for a good balance between speed and resource requirements.
    ML-KEM-512/768/1024 (CRYSTALS-Kyber), Balanced (XIP6110B)
  • RISC-V MC CPU IP核

    IP Core

    RISC-V MC CPU IP核

    Propel IP模块:具有可选的定时器和PIC子模块的32位RISC-V处理器核,通过AHB-Lite总线连接到其他Propel各类IP模块。
    RISC-V MC CPU IP核
  • RISC-V SM CPU IP核

    IP Core

    RISC-V SM CPU IP核

    RISC-V SM CPU IP可以在处理数据和指令时处理外部中断。该IP支持RV32I指令集、外部中断和调试,遵循JTAG – IEEE 1149.1标准。
    RISC-V SM CPU IP核
  • RISC-V RX CPU IP核

    IP Core

    RISC-V RX CPU IP核

    莱迪思RISC-V RX IP使用32位RISC-V处理器核和多个子模块,在监控外部中断的同时处理数据和指令。
    RISC-V RX CPU IP核
  • RISC-V Nano CPU IP Core

    IP Core

    RISC-V Nano CPU IP Core

    The RISC-V Nano CPU IP contains a 32-bit RISC-V processor core that supports the RV32I instruction set and a lightweight interrupt merge controller.
    RISC-V Nano CPU IP Core
  • Tightly-Coupled Memory (TCM) IP Core

    IP Core

    Tightly-Coupled Memory (TCM) IP Core

    The Tightly-Coupled Memory (TCM) IP ensures low-latency automatic selection of the best memory type for user-selected application.
    Tightly-Coupled Memory (TCM) IP Core
  • RISC-V AXI4 I/O Physical Memory Protection (IOPMP) IP Core

    IP Core

    RISC-V AXI4 I/O Physical Memory Protection (IOPMP) IP Core

    RISC-V I/O Memory Protection IP protects the data in specific memory regions and allows the CPU to control external AXI manager access to AXI subordinates at run-time.
    RISC-V AXI4 I/O Physical Memory Protection (IOPMP) IP Core
  • Octal SPI Controller IP Core

    IP Core

    Octal SPI Controller IP Core

    ​​Octal SPI Controller IP Core supports various types of SPI protocols & provides a flexible Transaction Layer Interface to the PCI Express Bus.​
    Octal SPI Controller IP Core
  • Driver Monitoring System (DMS) Demonstration

    演示

    Driver Monitoring System (DMS) Demonstration

    The Driver Monitoring System Solution Demonstration highlights the capabilities of the newly introduced features of the Lattice Drive Solution Stack.
    Driver Monitoring System (DMS) Demonstration
  • AXI4 to APB Bridge Module

    IP Core

    AXI4 to APB Bridge Module

    The Lattice Semiconductor AXI4 to APB Bridge Module provides an interface between the high-speed AXI4 and APB.
    AXI4 to APB Bridge Module
  • ​​M-PESTI Initiator IP核

    IP Core

    ​​M-PESTI Initiator IP核

    莱迪思M-PESTI IP核可在系统启动前检测外设存在和属性采集。
    ​​M-PESTI Initiator IP核
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