莱迪思解决方案

IP Core

FFT 编译器

The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, Certus-NX, CertusPro-NX, MachXO5-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

Data Communication, DSP, Guidance Systems, Automotive, DSP Bundle, SDR, Smart munitions 

IP Core

FIR 滤波器生成器

可灵活配置的多通道FIR滤波器。最多支持256个通道，每个拥有2048个抽头。输入和系数宽度为4至32位。

ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

DSP, Guidance Systems, Automotive, DSP Bundle, SDR, Smart munitions 

IP Core

JESD204B IP核

莱迪思JESD204B IP核是用于数据转换器和FPGA器件之间的高速串行接口，用于取代传统接口。

ECP5 / ECP5-5G, LatticeECP3, CertusPro-NX, Avant-G, Avant-X, Certus-N2 

ADC/DAC, DSP, SDR 

IP Core

PCI Express x1、x4 Root Complex Lite IP核

Provides a PCI Express x1 and x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M 

PCIe, Guidance Systems, Automotive, PCIe Bundle, SDR, Smart munitions 

IP Core

ML-KEM-512/768/1024 (CRYSTALS-Kyber), Balanced (XIP6110B)

ML-KEM-512/768/1024 is an IP core for post-quantum Key Encapsulation Mechanism (KEM), optimized for a good balance between speed and resource requirements.

Avant-E, Avant-G, Avant-X, CertusPro-NX, ECP5 / ECP5-5G 

Encryption, NIST, Public/Private Key, Security, SDR, Avionics 

IP Core

定时器/计数器IP

莱迪思半导体定时器/计数器IP用于跟踪系统中的超时，并在检测到超时时向CPU生成中断。

Certus-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, CertusPro-NX, CrossLink, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 LP/HX, iCE40 Ultra/UltraLite, iCE40 UltraPlus, LatticeECP2/M, LatticeECP3, LatticeSC/M, LatticeXP2, Mach-NX, MachXO, MachXO2 , MachXO3, MachXO3D, MachXO5-NX, Certus-N2 

AMBA, Lattice Propel, Lattice Diamond, Lattice Radiant, APB, AHB-Lite, Lattice Sentry, Lattice Sentry PFR IP Package, Security 

IP Core

AXI4 to APB Bridge Module

The Lattice Semiconductor AXI4 to APB Bridge Module provides an interface between the high-speed AXI4 and APB.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

APB, AXI4, Lattice Avant, Lattice Propel 

IP Core

AXI4 to AHB-Lite Bridge Module IP Core

Lattice Semiconductor AXI4 to AHB-Lite Bridge Module provides an interface between the high-speed AXI4 and AHB-Lite.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

AHB-L, AHB-Lite, AXI4, Lattice Avant, Lattice Propel 

IP Core

AHB-Lite to AXI4 Bridge Module IP Core

The Lattice AHB-Lite to AXI4 Bridge IP Core is used for interfacing one AHB-Lite Manager and one AXI4 Subordinate.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

AHB-L, AHB-Lite, AXI4, Lattice Avant 

IP Core

AXI4 Interconnect IP Core

AXI4 Interconnect is a flexible, versatile, and easy-to-use IP with high-performance and low-latency interconnect fabric for AMBA 4 AXI/AXI-lite based systems.

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, MachXO5-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3 

AMBA, AXI4, AXI, AXI-Lite Interface, Lattice Avant 

IP Core

视频缩放器IP核

莱迪思视频缩放器IP核用于放大或缩小视频流的分辨率。

Certus-N2, Avant-E, Avant-G, Avant-X, CrossLink-NX, Certus-NX, CertusPro-NX, ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, MachXO5-NX 

Lattice Drive, AXI, AXI-Lite Interface, Video Scaling, Embedded Ram, DSP, DSP Bundle 

Reference Design

Lattice QSPI to NXP MPU Interface Reference Design

This Lattice and NXP joint solution is designed to implement FlexSPI communication and expedite deployment using the Lattice ECP5 Evaluation Board.

ECP5 / ECP5-5G 

MPU, FlexSPI, FlexIO, IMX, Avionics 

Reference Design

人脸识别参考设计

在ECP5 FPGA上使用卷积神经网络检测人脸，并与已注册的人脸进行匹配。可以用于识别其他任何对象。

ECP5 / ECP5-5G, CertusPro-NX, CrossLink-NX 

Object Detection, Object Identification, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs, Avionics 

Reference Design

对象计数

基于莱迪思sensAI的对象计数应用示例。包括SPI、DDR IP模块、ISP引擎、8个CNN引擎和一个计数/标记叠加（overlay）引擎。

ECP5 / ECP5-5G, CrossLink-NX 

Machine Learning/AI, Object Counting, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, Automotive, Avionics 

IP Core

Helion IONOS图像信号处理IP系列

来自Helion Vision的全面、高质量、可自行配置的ISP解决方案，包括了从基本到高级的高动态范围成像（HDRI）色彩流水线。

MachXO, LatticeXP2, LatticeECP3, CrossLink, ECP5 / ECP5-5G, CrossLink-NX 

HDR, Image Processing, Video Tx/Rx, Lattice mVision, Automotive, Avionics 

IP Core

SPI Sub IP Core

The SPI Sub IP Core is a versatile, efficient solution for SPI communication between an FPGA and a microcontroller, SoC, or another FPGA.

Avant-E, Avant-G, Avant-X, MachXO5-NX, CertusPro-NX, Certus-NX, MachXO3, ECP5 / ECP5-5G 

AXI, SPI 

IP Core

AXI Register Slice IP Core

The AXI Register Slice connects the AXI subordinate to the AXI manager by introducing pipeline stages in between to close the timing in critical paths.

LatticeECP3, ECP5 / ECP5-5G, CrossLink-NX, Certus-NX, MachXO5-NX, CertusPro-NX, Avant-E, Certus-N2 

AXI, AXI-Lite Interface, Lattice Propel, Lattice Radiant 

IP Core

三倍速以太网MAC

在主机处理器和以太网之间发送和接收数据。符合IEEE 802.3标准。支持10/100/1000 Mbps传输速率。

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, LatticeSC/M, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

Data Communication, Ethernet, Defense, Automotive, APB, AXI, AXI-Lite Interface, AHB, Ethernet Bundle 

Reference Design

Generic Soft SPI Master Controller Reference Design

Provides an interface between a generic processor with parallel bus interface and external SPI devices.

MachXO2 , MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 

SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 

Reference Design

I2C从动软核

使用Verilog实现软核I2C从动，支持多款莱迪思FPGA系列

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2 , MachXO3 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C