Defense Overview

Meet mission requirements with low power and high reliability Lattice FPGAs

With inherent SEU Resiliency, single chip non-volatile crypto solutions, and wide operating temperature range Lattice offers modernized FPGA platforms for the development of next generation milcom, guidance, and imaging solutions.

With a 35 year heritage in high reliability and ruggedized environments, Lattice FPGAs play a vital role in high reliability, secure and safety critical applications within the communications, data center, industrial, automotive, high-volume consumer, and aerospace & defense markets.

SWAP-C Optimized COTS FPGAs, with off-the-shelf FPGA products architected to offer extremely low power and a small footprint while supporting critical infrastructure applications and long product life without trading performance.

Key Lattice FPGA Features & Benefits

  • Lowest soft error rate and latchup immunity, more reliable than bulk CMOS FPGAs independent of the configuration bit technology
  • Industry leading incredibly small form-factor (starting at 2.5 mm x 2.5 mm) and reduced pitch packages (starting at 0.4 mm)
  • 75% better power than similar FPGAs
  • Hardened security engine with secure Unique ID and Side Channel Resiliency
  • Design tools offer latest advanced design flows which facilitate secure, low power applications, many iterations per day and fast time to market
  • Accelerate your design with Lattice’s award winning solution stacks

To learn how Lattice meets the technology needs of defense applications including leaded packages, extended operating temperature range and Known Good Die, contact the Lattice sales team by clicking below.

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Example Applications

Guidance Systems

  • Programmable system integration with 5Gbps transceivers, embedded memory, DSP and MCU
  • Sensor fusion, any-to-any connectivity and embedded vision

Chain of Trust Implementation

  • Hardware Root-of-Trust is the first link in chain that protects mission critical compute and communication platforms
  • Hardened device configuration engine cryptographically authenticates MachXO3D’s configuration image at power-on
  • Embedded security block provides cryptographic functions to authenticate other platform firmware at power-on

Mixed Reality Head-Mount Display

  • Small form factor packaging to meet stringent signal processing requirements
  • Flexible interfaces to sensors, analog and RF front-ends

FPGAs Best Suited for Defense

  • Certus-NX
    Certus-NX is Built on Lattice Nexus platform with Up to 4x lower power vs. similar FPGAs and Up to 100x higher reliability based on 28 nm FD-SOI technology solves the most challenging problems in leading edge defense platforms.
  • CrossLink-NX
    The Crosslink-NX with low soft error rate and lowest power in its class enables efficient processing, bridging and management capabilities to solve challenging problems in Software Defined Radios, Guidance Systems and Unmanned Aerial Vehicle (UAV).
  • MachXO3D
    The MachXO3D is the root of trust enabler with all required features onboard on a monolithic silicon with small footprint and low power that could be deployed in systems of all sizes, offering the most compact solution for untrusted supply chain.

Leaded Package Overview

Lattice offers leaded packaging services to eliminate the risk for tin-whisker and to improve reliability in presence of high shock and vibration applications.

Lattice Packages Wirebond Flip Chip
Wafer Pad or Bump Lead free Lead free
Substrate bump or pad finish Lead free Lead free
Caps No Caps No Caps
Substrate Solder Balls Leaded Leaded
Package Reflow Leaded Leaded

Known Good Die Product Overview

Lattice offers a wide variety of known good die products, tested to full data sheet specification within the specified temperature range with full traceability for each die shipped.

Family Logic Density Test Method Programmability Temperature Range
LatticeECP3 150K Known Good Die Volatile -40 C to 125 C
LatticeXP2 40K Good Die Non-volatile -40 C to 125 C
ECP5 85K Known Good Die Volatile -40 C to 125 C
MachXO3 10K Known Good Die Non-volatile -40 C to 105 C

Reference Designs

Lattice Sentry Root of Trust Reference Design for MachXO3D

Reference Design

Lattice Sentry Root of Trust Reference Design for MachXO3D

This design utilizes Lattice Sentry IP to help you develop and test a complete NIST 800-193-compliant PFR solution. You can modify to suit your specific needs.
Lattice Sentry Root of Trust Reference Design for MachXO3D
Human Presence Detection

Reference Design

Human Presence Detection

Uses Lattice sensAI IP to continuously search for the presence of a human and reports results. Can be adapted to detect any other object.
Human Presence Detection
Object Counting

Reference Design

Object Counting

An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine
Object Counting
MIPI CSI-2 Virtual Channel Aggregation

Reference Design

N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

Reference Design

IP Cores

Lattice Sentry QSPI Monitor IP Core for MachXO3D

IP Core

Lattice Sentry QSPI Monitor IP Core for MachXO3D

Propel IP Module for Lattice Sentry: Monitors traffic on SPI/QSPI bus to identify and block potentially illegal traffic.
Lattice Sentry QSPI Monitor IP Core for MachXO3D
RISC-V MC CPU IP Core

IP Core

RISC-V MC CPU IP Core

Propel IP Module: 32-bit RISC-V processor core with optional Timer and PIC sub-modules, connects via AHB-Lite bus to other Propel IP modules and more.
RISC-V MC CPU IP Core
CNN Accelerator IP

IP Core

CNN Accelerator IP

Implement AI solutions with CNNs from common or custom networks. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.
CNN Accelerator IP
I3C Master IP Core

IP Core

I3C Master IP Core

Bus controller following the MIPI I3C specification. Up to 12.5 MHz Push-Pull, legacy I2C support, Multi-master capability, In-Band Interrupt, Hot-join and more
I3C Master IP Core
I3C Slave IP Core

IP Core

I3C Slave IP Core

Interfaces to the MIPI I3C specification. Up to 12.5 MHz Push-Pull, legacy I2C support, Multi-master capability, In-Band Interrupt, Hot-join and more
I3C Slave IP Core

Development Kits & Boards

CrossLink-NX Evaluation Board

Board

CrossLink-NX Evaluation Board

For general evaluation and development with CrossLink-NX, includes many flexible interfaces such as FMC and PMOD with generous device IO access
CrossLink-NX Evaluation Board
USB3-GbE VIP IO Board

Board

USB3-GbE VIP IO Board

Output board for Video Interface Platform (VIP) and Embedded Vision Development Kit - adds video over USB 3.0 and Gigabit Ethernet.
USB3-GbE VIP IO Board
ECP5 Evaluation Board

Board

ECP5 Evaluation Board

Evaluation and development for ECP5-5G FPGA - 85K LUTs. Includes generous IO access and easy expansion to PMOD, Arduino, RaspberryPI, SERDES interface and more
ECP5 Evaluation Board
MachXO3D Breakout Board

Board

MachXO3D Breakout Board

Small low-cost board with generous access to MachXO3D FPGA IO for general purpose evaluation and development
MachXO3D Breakout Board

Demos

Lattice Sentry Root of Trust Demo for MachXO3D

Demo

Lattice Sentry Root of Trust Demo for MachXO3D

A complete bitstream/firmware package which helps you demonstrate and test a NIST 800-193-compliant PFR solution on the Lattice Sentry Demo Board for MachXO3D
Lattice Sentry Root of Trust Demo for MachXO3D
Hand Gesture Detection

Demo

Hand Gesture Detection

Uses artificial intelligence (AI) to implement hand gesture detection algorithm using a tiny, low-power iCE40 UltraPlus FPGA
Hand Gesture Detection
Human Counting

Demo

Human Counting

Human upper-body detection and counting demonstration utilizes Lattice’s ECP5 FPGA and a Convolutional Neural Network (CNN) acceleration engine
Human Counting
Human Face Detection

Demo

Human Face Detection

Uses Lattice sensAI IP to detect human faces on a tiny, low-power iCE40 UltraPlus FPGA implementing AI at the edge. Adaptable to detect other objects.
Human Face Detection
Human Face Identification

Demo

Human Face Identification

Register and identify faces without retraining, eliminating the need for uploading images and lengthy retraining using a GPU.
Human Face Identification

Quality Programs

Lattice is committed to Industry Leadership in the supply of high quality programmable logic components and software design tools.

Commitment to Defense

Lattice is committed to providing the Defense market with industry’s most complete portfolio optimized for SWAP-C, longest product life cycle and dedicated local engineering support.

Documentation

Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Defense Solutions Brief
I0271 Rev 1 8/4/2020 PDF 1.6 MB

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Quality & Reliability

Reference Material to Help Answer Your Questions

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