莱迪思解决方案

IP Core

RISC-V SM CPU IP核

RISC-V SM CPU IP可以在处理数据和指令时处理外部中断。该IP支持RV32I指令集、外部中断和调试，遵循JTAG – IEEE 1149.1标准。

Certus-N2, Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, MachXO3D, MachXO3, MachXO2 , Avant-G, Avant-X, iCE40 Ultra/UltraLite 

AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 

IP Core

RISC-V Nano CPU IP Core

The RISC-V Nano CPU IP contains a 32-bit RISC-V processor core that supports the RV32I instruction set and a lightweight interrupt merge controller.

Certus-N2, Avant-E, Avant-G, Avant-X, MachXO5-NX, CrossLink-NX, CertusPro-NX, Certus-NX, MachXO3D, MachXO2 , iCE40 UltraPlus, MachXO4 

Soft Processor, RISC-V, Lattice Propel, Lattice Diamond, Lattice Radiant, Defense, AHB-Lite 

IP Core

定时器/计数器IP

莱迪思半导体定时器/计数器IP用于跟踪系统中的超时，并在检测到超时时向CPU生成中断。

Certus-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, CertusPro-NX, CrossLink, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 LP/HX, iCE40 Ultra/UltraLite, iCE40 UltraPlus, LatticeECP2/M, LatticeECP3, LatticeSC/M, LatticeXP2, Mach-NX, MachXO, MachXO2 , MachXO3, MachXO3D, MachXO5-NX, Certus-N2 

AMBA, Lattice Propel, Lattice Diamond, Lattice Radiant, APB, AHB-Lite, Lattice Sentry, Lattice Sentry PFR IP Package, Security 

演示

Single Wire Signal Aggregation Demonstration

Single Wire Signal Aggregation Demonstration contains two boards to demonstrate the complete working design in a stand-alone configuration.

iCE40 UltraPlus 

Single Wire, Signal Aggregation, Bus Controllers, GPIO, I2C, I2S, UART, Defense 

Reference Design

单线聚合

使用低成本FPGA以TDM的方式聚合多个数据流，例如I2C、UART、I2S和GPIO，通过单线传输并解聚合。

iCE40 UltraPlus 

Bus Controllers, Signal Aggregation, Single Wire, Defense 

Reference Design

人员侦测

使用莱迪思sensAI IP持续搜索附近是否有人存在并报告结果。可作修改用于检测其他任何物体。

iCE40 UltraPlus 

Machine Learning/AI, Object Detection, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense 

IP Core

I3C主控IP核

I3C接口在改善总线能耗效率的同时，比I2C速度提高了10倍以上。

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, iCE40 UltraPlus, Avant-E, Avant-G, Avant-X, Certus-N2, MachXO3D, Mach-NX 

I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive, MIPI Bundle, Lattice Sentry 

IP Core

I3C从设备IP核

莱迪思I3C接口在改善总线能耗效率的同时，比I2C速度提高了10倍以上。

CertusPro-NX, CrossLink-NX, Certus-NX, MachXO5-NX, iCE40 UltraPlus, Avant-E, Avant-G, Avant-X, Certus-N2, MachXO3D, Mach-NX 

I3C, Bus Controllers, TOR Switch, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense, 5G, Automotive, MIPI Bundle 

Board

Himax HM01B0 UPduino Shield

Himax HM01B0 UPduino Shield是一款使用iCE40 UltraPlus™ FPGA提供低成本、低功耗人机交互解决方案的模块化AI开发平台

iCE40 UltraPlus 

Arduino, Camera, Machine Learning/AI, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs 

IP Core

USB 2.0 Device with FIFO Interface (USB20HF)

USB20HF IP Core provides FIFO & ULPI interface. It supports High Speed and Full Speed functionality for 15 IN/OUT endpoints.

CrossLink-NX, iCE40 UltraPlus, MachXO2  

FMC, Data Communication, Camera, ULPI, USB2, FIFO 

Board

DPControl iCEVision开发板

iCEVision是一款专为AI视觉应用打造的快速原型设计平台

iCE40 UltraPlus 

ArduCAM, Breakout, Camera, CSI Camera, Machine Learning/AI, PMOD, Video Tx/Rx 

Board

iCE40 UltraPlus 分线板

适用于iCE40 UltraPlus 5K版器件的分线板

iCE40 UltraPlus 

Breakout, LED Control, Defense, Avionics 

Board

单线聚合演示/开发板

使用全球超小的FPGA以TDM方式聚合多个数据流（例如I2C、I2S和GPIO），通过单线传输和解聚合。

iCE40 UltraPlus 

Single Wire, Bus Controllers, Signal Aggregation 

Board

iCEstick评估套件

一款低成本、使用USB接口，带有一片iCE40HX-1k的iCE40评估板

iCE40 LP/HX 

Breakout, IrDA, PMOD, UART 

Board

iCE40 Ultra分线板（Breakout Board）

iCE40 Ultra分线板（Breakout Board）硬件和文档信息

iCE40 Ultra/UltraLite 

Breakout, LED Control 

Reference Design

8N1 UART Transceiver Reference Design

8-bit data, no parity, and 1 stop bit Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel and parallel to serial conversions on data characters received from a peripheral device or CPU

iCE40 UltraPlus, MachXO2  

UART, Bus Controllers, TOR Switch 

IP Core

APB互连模块

Propel IP模块：完全参数化、最多可连接32个主控和32个从动设备。数据总线宽度最大为32位。地址宽度最大为32位。

Certus-N2, CertusPro-NX, Avant-E, Avant-G, Avant-X, MachXO2 , MachXO3, MachXO3D, Mach-NX, MachXO5-NX, CrossLink-NX, Certus-NX, iCE40 UltraPlus, MachXO4 

AMBA, APB, Lattice Propel, Automotive 

Reference Design

Generic Soft SPI Master Controller Reference Design

Provides an interface between a generic processor with parallel bus interface and external SPI devices.

MachXO2 , MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 

SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 

演示

I2C主控和从动软核 – 简单读写操作

演示了I2C主控和从动简单的数据读写操作。

iCE40 UltraPlus, MachXO3 

Computing, IoT, TOR Switch, Bus Controllers, I2C 

Reference Design

I2C从动软核

使用Verilog实现软核I2C从动，支持多款莱迪思FPGA系列

CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2 , MachXO3 

5G, Computing, IoT, TOR Switch, Bus Controllers, I2C