Launchers

Radiation Tolerant, Compact, Low power FPGAs

Launch vehicles rely on extremely reliable FPGAs for navigation, guidance, telemetry and safety systems. Lattice FPGAs are used as central sensor interfacing,  control and management of real time data and offer low latency response to adjust engine thrust and ensure accurate trajectory and landing as they enble automation and health monitoring of fault tolerant fail-safe platforms. 

  • Immunity to single event latchup and high Total Ionizing Dose resilience in presence of heavy ions
  • Novel configuration memory architecture significantly lowers multiple-bit upsets.
  • Mitigation techniques including built-in error detection and correction , sophisticated Triple Modular Redundancy and fault tolerant design techniques
  • Robust and predictable operation in extreme shock, thermal environments ensure reusability and durability for multiple launches.

Features

  • Low power, high I/O FPGAs in ruggesdized packages simplify sensor, actuator, motor control connectivity and flight computer interfacing.
  • Support for FPGA operations in harsh conditions including extreme temperature and high radiation environmnts with Lowest soft error rate (SER) in its class and highest latch-up immunity coupled
  • with built-in scrubber to maximize integrity of launch systems.
  • Commercial-off-the-shelf (COTS) plastic components speed up prototype build and maintain same design for flight.

Jump to

Example Applications

Sensor Control

  • Bridge processor to sensors for distributed architectures
  • Small packages and soft RISC-V Cores for control / management
  • Embedded ADC and DAC blocks to simplify design and test

Telemetry

  • Instant-on performance enable fast response and boot time requirements
  • In-orbit reconfiguration to future proof your design
  • Large on-chip memory for on-chip processing and storage

Data Acquisition

  • Digital Signal Processing to offload SBC and accelerate complex functions
  • High speed Serdes simplifies design and supports multiple protocols
  • Vision interface and signal processing adapts to a variety of sensors

Reference Design

Sensor Hub Block Diagram

Reference Design

ADC Interface

Reference Design

ADC Interface

Interfaces with the Texas Instruments (TI) ADS64XX family of ADCs via LatticeECP3 FPGA high-speed LVDS I/O
ADC Interface
ECC Module Reference Design

Reference Design

ECC Module Reference Design

Provides Single Error Correction - Double Error Detection (SECDED) capability based on a class of optimal minimum oddweight error parity codes
ECC Module Reference Design

Demo

Lattice Image Signal Processing Block Diagram

Demo

Lattice Image Signal Processing Demo

Provides a complete ISP example design on the Lattice ECP5 FPGA for the Embedded Vision Development Kit, ideal for Industrial, Medical, and Automotive applications.
Lattice Image Signal Processing Demo

IP Cores

UART 16550 IP Core Block Diagram

IP Core

UART 16550 IP Core

​​Lattice UART16550 IP Core is designed for use in serial communication, supporting the RS-232, RS-422, RS-485, and Electronic Industries Association (EIA) standards, among others.​
UART 16550 IP Core

Development Kits & Boards

CertusPro-NX ML Board Side Image

Board

CertusPro-NX Voice and Vision Machine Learning Board

Design AI use cases for the Edge quickly! This board along with the Lattice sensAI solution stack provide the tools for developing vision and audio-based AI applications.
CertusPro-NX Voice and Vision Machine Learning Board

Documentation

Quick Reference
Information Resources
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High Reliability & Functional Safety for FPGAs with Synplify & Radiant
WP00361.03/25/2024PDF2.3 MB
Lattice Avant SED/SEC User Guide
FPGA-TN-022900.836/11/2026PDF971.3 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-021452.54/15/2026PDF1.6 MB
Power Management and Calculation for Certus-NX, CertusPro-NX, and MachXO5-NX Devices
FPGA-TN-022571.15/31/2022PDF1 MB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-020415.35/6/2026PDF753.9 KB
Thermal Management
FPGA-TN-020446.08/19/2026PDF976.2 KB
TITLENUMBERVERSIONDATEFORMATSIZE
Select All
Lattice Avant SED/SEC User Guide
FPGA-TN-022900.836/11/2026PDF971.3 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-021452.54/15/2026PDF1.6 MB
Power Management and Calculation for Certus-NX, CertusPro-NX, and MachXO5-NX Devices
FPGA-TN-022571.15/31/2022PDF1 MB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-020415.35/6/2026PDF753.9 KB
Thermal Management
FPGA-TN-020446.08/19/2026PDF976.2 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

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SEDC IP Module User Guide – Lattice Radiant Software
FPGA-IPUG-020661.26/23/2021PDF908.3 KB
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Aerospace and Defense Brochure
BR00011.06/29/2026PDF3.4 MB
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High Reliability & Functional Safety for FPGAs with Synplify & Radiant
WP00361.03/25/2024PDF2.3 MB