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  • Single Wire Signal Aggregation Reference Design

    Reference Design

    Single Wire Signal Aggregation Reference Design

    Single Wire Signal Aggregation Reference Design is configurable, the number of I2C/I2S busses and GPIOs and single wire protocol packet length can be adjusted.
    iCE40 UltraPlus 
    Bus Controllers, Signal Aggregation, Single Wire, Defense 
    Single Wire Signal Aggregation Reference Design
  • Human Presence Detection

    Reference Design

    Human Presence Detection

    Uses Lattice sensAI IP to continuously search for the presence of a human and reports results. Can be adapted to detect any other object.
    iCE40 UltraPlus 
    Machine Learning/AI, Object Detection, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Defense 
    Human Presence Detection
  • 8N1 UART Transceiver Reference Design

    Reference Design

    8N1 UART Transceiver Reference Design

    8-bit data, no parity, and 1 stop bit Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel and parallel to serial conversions on data characters received from a peripheral device or CPU
    iCE40 UltraPlus, MachXO2 
    UART, Bus Controllers, TOR Switch 
    8N1 UART Transceiver Reference Design
  • Generic Soft SPI Master Controller Reference Design

    Reference Design

    Generic Soft SPI Master Controller Reference Design

    Provides an interface between a generic processor with parallel bus interface and external SPI devices.
    MachXO2, MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 
    SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
    Generic Soft SPI Master Controller Reference Design
  • Soft I2C Bus Master

    Reference Design

    Soft I2C Bus Master

    Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families
    CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3, Mach-NX 
    5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 
    Soft I2C Bus Master
  • Soft I2C Slave Peripheral

    Reference Design

    Soft I2C Slave Peripheral

    Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families
    CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3 
    5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 
    Soft I2C Slave Peripheral
  • Infrared Remote Tx/Rx Reference Designs

    Reference Design

    Infrared Remote Tx/Rx Reference Designs

    Implements an interface to IR receive and/or IR transmit. This includes PWM (pulse width modulation) timing and protocol conversion to an SPI /I2C bus
    iCE40 LP/HX, iCE40 Ultra / UltraLite, iCE40 UltraPlus 
    I2C, Infrared LED, PWM, SPI, UAVs 
    Infrared Remote Tx/Rx Reference Designs
  • RGB LED Reference Design

    Reference Design

    RGB LED Reference Design

    A complete RGB LED design that controls the color, blinking rate, brightness and breathing of an RGB LED.
    iCE40 UltraPlus, iCE40 Ultra / UltraLite, iCE40 LP/HX 
    LED Control, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
    RGB LED Reference Design
  • iCE Bling by Electronut Labs

    Reference Design

    iCE Bling by Electronut Labs

    Looking for a little fun and style? Electronut Labs has designed a pair of LED earings controlled with an iCE40UP5K FPGA. Design files are available on github.
    iCE40 UltraPlus 
    Community Sourced, LED Control 
    iCE Bling by Electronut Labs
  • Simple Sigma-Delta ADC

    Reference Design

    Simple Sigma-Delta ADC

    Implements an Analog-to-Digital (ADC) using on-FPGA differntial LVDS inputs (or inexpensive analog comparitor). Save cost by eliminating external ADC devices.
    MachXO, MachXO2, LatticeXP2, iCE40 UltraPlus 
    ADC/DAC, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Smart munitions 
    Simple Sigma-Delta ADC
  • SPI Slave to PWM Generation Reference Design

    Reference Design

    SPI Slave to PWM Generation Reference Design

    Sets the frequency and duty cycle of a PWM (Pulse-Width Modulator) using data from an external SPI master.
    MachXO2, iCE40 UltraPlus 
    SPI, PWM, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Space, Satellite Communications, Launchers, Smart munitions 
    SPI Slave to PWM Generation Reference Design
  • SPI to MIPI D-PHY

    Reference Design

    SPI to MIPI D-PHY

    Bridges and decompresses video transmitted over SPI to DSI displays, up to 108Mbps. High speed and low-power modes.
    iCE40 UltraPlus 
    CSI-2, MIPI, SPI, Video Tx/Rx, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
    SPI to MIPI D-PHY
  • Machine Learning / On-device AI

    Reference Design

    Machine Learning / On-device AI

    Uses artificial intelligence (AI) to implement a human detection algorithm
    iCE40 UltraPlus 
    Machine Learning/AI, Object Detection, Defense 
    Machine Learning / On-device AI
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